Physical verification 3 - 5 + years

Meyvnsystems; Bengaluru; On-site; INR 1,200,000 - 2,400,000; Full time

Job summary

MeyvnSystems in Bengaluru is seeking a Physical Verification Engineer with 3–5+ years of experience for an on-site role. You will perform DRC, LVS, ERC checks on complex SoC and mixed-signal designs, ensuring compliance with foundry rules and internal quality standards.

You will collaborate with layout, circuit design, and implementation teams, debug verification issues, refine sign-off flows, and contribute to tape-out readiness while supporting multiple projects under tight schedules.

Qualifications

• Strong analytical skills to interpret verification reports, identify root causes, and propose effective solutions.
• Clear and professional communication skills to collaborate with cross-functional design teams and document findings.
• Experience in Formal Verification or equivalent verification methodologies relevant to physical and functional sign-off.
• Customer service and stakeholder management to support internal and external partners with timely, accurate verification outcomes.
• Hands-on experience with industry-standard physical verification tools (e.g., Calibre, Pegasus, ICV, or similar) and foundry rule decks.
• Solid understanding of CMOS process technologies, layout principles, and sign-off requirements for SoC, analog, and mixed-signal designs.
• Bachelor’s or Master’s degree in Electrical/Electronics Engineering or related field, or equivalent practical experience in semiconductor design.
• Ability to work on-site in Bengaluru, manage multiple tasks, meet project deadlines, and contribute positively to a collaborative engineering environment.

Responsibilities

• Perform physical verification checks (DRC, LVS, ERC, and related sign-off tasks) on complex SoC and mixed-signal designs.
• Collaborate with layout, circuit design, and implementation teams to debug verification issues, propose layout optimizations, and drive closure for tape-out.
• Run and analyze verification reports, maintain and refine sign-off flows, create documentation, and support cross-functional reviews.
• Coordinate with external partners, contribute to methodology improvements, and support multiple projects under tight schedules.

Skills

Analytical skills

Communication

Formal verification

Customer service

Multi-tasking

Education

Bachelor’s or Master’s degree in Electrical/Electronics Engineering

Tools

Calibre

Pegasus

ICV

Job description

Company Description

MeyvnSystems is a Singapore-based fabless semiconductor design, consulting, and analytics company specializing in advanced SoC design, energy-efficient RF, analog, mixed-signal, and power management solutions for embedded and stand-alone applications. The company serves cutting-edge markets including portable, handheld, wearable electronics, IoT, 5G, cloud, and data analytics. Its engineering team is composed of experienced IC design professionals who develop innovative architectures tailored to modern semiconductor needs. With more than 20 years of combined industry experience, MeyvnSystems focuses on delivering high-quality solutions that help customers meet their performance and success metrics. The company values technical excellence, collaboration, and customer-centric innovation across all projects.

Role Description

This is a full-time, on-site role for a Physical Verification Engineer with 3–5+ years of experience, based in Bengaluru. The role involves performing physical verification checks (DRC, LVS, ERC, and related sign-off tasks) on complex SoC and mixed-signal designs, ensuring compliance with foundry design rules and internal quality standards. The engineer will collaborate closely with layout, circuit design, and implementation teams to debug verification issues, propose layout optimizations, and drive closure for tape-out. Daily activities include running and analyzing verification reports, maintaining and refining sign-off flows, creating documentation, and supporting cross-functional reviews. The role may also include coordinating with external partners, contributing to methodology improvements, and supporting multiple projects under tight schedules.

Qualifications

• Candidates should possess strong Analytical Skills to interpret physical verification reports, identify root causes, and propose effective solutions.
• Candidates should possess clear and professional Communication skills to collaborate with cross-functional design teams and document findings.
• Candidates should possess experience in Formal Verification or equivalent verification methodologies relevant to physical and functional sign-off.
• Candidates should possess Customer Service and stakeholder management skills to support internal and external partners with timely, accurate verification outcomes.
• Hands-on experience (3–5+ years) with industry-standard physical verification tools (e.g., Calibre, Pegasus, ICV, or similar) and foundry rule decks.
• Solid understanding of CMOS process technologies, layout principles, and sign-off requirements for SoC, analog, and mixed-signal designs.
• Bachelor’s or Master’s degree in Electrical/Electronics Engineering or a related field, or equivalent practical experience in semiconductor design.
• Ability to work on-site in Bengaluru, manage multiple tasks, meet project deadlines, and contribute positively to a collaborative engineering environment.