Physical Design Engineer

Neurealm

Ernakulam, Chennai, Bengaluru

On-site

INR 1,200,000 - 1,800,000

Full time

3 days ago
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Job summary

Neurealm in Kerala, India is seeking an experienced IC Design Engineer to lead floor-planning, CTS, power routing, place-and-route, and timing closure for block and top-level designs on 14nm or smaller nodes. The role emphasizes DRC/LVS and collaboration with cross-functional teams.

You will mentor junior engineers, ensure designs meet customer requirements, perform static timing analysis, and drive design fixes, with strong communication and problem-solving skills.

Qualifications

  • In-depth experience in floor-planning, CTS, power routing, place and route, timing closure, DRC, and LVS.
  • Experience with Innovus or Tempus.
  • Familiarity with 14nm or smaller nodes.
  • Proficiency in static timing analysis and physical verification.
  • Ability to mentor and collaborate with junior engineers.
  • Strong problem-solving and communication skills.

Responsibilities

  • Execute floor-planning, CTS, power routing, place-and-route, timing closure, DRC, and LVS for block-level and top-level designs.
  • Work on the latest technology nodes (14nm or lesser) and ensure compliance with customer requirements.
  • Conduct static timing analysis and implement appropriate fixes.
  • Collaborate closely with cross-functional teams, including mentoring and supporting junior engineers.
  • Demonstrate the ability to work on designs without a customer flow if required.
  • Contribute to the overall success of the team by actively participating in problem solving and maintaining effective communication within the team.

Skills

Floor planning
CTS
Power routing
Place & route
Timing closure
DRC
LVS
Static timing analysis
Mentoring
Communication

Education

BE/ME or BTech/MTech in Electrical Engineering or related field

Tools

Innovus
Tempus

Job description

Responsibilities:
  • Execute floor-planning, CTS, power routing, place and route, timing closure, DRC, and LVS for block-level and top-level designs
  • Work on the latest technology nodes (14nm or lesser) and ensure compliance with customer requirements
  • Conduct static timing analysis and implement appropriate fixes
  • Collaborate closely with cross-functional teams, including mentoring and supporting junior engineers
  • Demonstrate the ability to work on designs without a customer flow if required
  • Contribute to the overall success of the team by actively participating in problem solving and maintaining effective communication within the team.
Requirements/Skills:
  • In-depth experience in floor-planning, CTS, power routing, place and route, timing closure, DRC, and LVS
  • Experience in advanced design methodologies and tools like Innovus or tempus
  • Familiarity with the latest technology nodes (14nm or lesser)
  • Proficiency in static timing analysis and physical verification methodologies
  • Strong problem-solving skills and effective communication abilities
  • Capability to mentor and work closely with junior engineers
Preferred Skills:
  • Previous experience working on designs without a customer flow Knowledge of advanced design methodologies and tools like Innovus or tempus
  • Excellent communication skills with a collaborative and team-oriented mindset
Educational Qualifications:
  • BE/ME or BTech/MTech in Electrical Engineering or related field
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