Memory Layout Engineer

UANDWE, Inc.; Bengaluru; On-site; INR 1,200,000 - 2,400,000; Full time

Job summary

UANDWE, Inc. seeks a layout design engineer to develop SRAM/CAM/RF memories using 5/3FF tech in Bengaluru. You will craft core memory blocks, perform floor planning, placement, power routing and ensure integration with compiler memories.

The role requires 3+ years of industry experience, proficiency with Cadence Virtuoso and Caliber, and strong problem solving plus communication skills to coordinate with design teams.

Qualifications

• Understanding of memory architecture and basic memory layout from scratch.
• Experience in building memory layout blocks and peripheral blocks (I/O, control, row drivers).
• Experience with compiler issues, reliability, EMI, and simulation effects.

Responsibilities

• Development of memory architecture building blocks such as Row Decoder, IO and Control.
• Floor planning for placement, power and global routing; pitched layout concepts.
• Compiler level integration and verification of compiler/custom memories.

Skills

Memory architecture

Row decoder

IO blocks

Control blocks

Layout planning

Power routing

Global routing

Compiler issues

Reliability

EMI considerations

Simulation effects

Tools

Cadence Virtuoso

Mentor Graphics Caliber

Job description

• Role: Layout Design of SRAM/CAM/RF compiler memories in 5/3FF technology.
• Responsibilities:Development of key building blocks of memory architecture such as Row Decoder, IO, Control. Skilled in pitched layout concepts, floor planning for Placement, Power and Global Routing. Compiler level integration, verification of Compiler/Custom memories.
• Skills : Well experienced in using industry standard EDA tools like Cadence Virtuoso, Mentor Graphics Caliber etc. Good problem solving and logical reasoning skills. Good communication skills required
• Experience :3to7Years

The customer is looking for the following expertise:

1.Understanding of memory architecture

2.Experience in creating basic memory layout s from scratch

3.Knowledge of memory peripheral blocks, including control blocks, I/O blocks, and row drivers

The candidate should have over 3 years of experience with all of the above and more than 2 years of relevant industry experience overall. Additionally, they are seeking expertise in:

4.Knowledge of compiler issues

5.Understanding of reliability issues

6.Simulation effects

7.EMI (Electromagnetic Interference) considerations