Memory Design Lead

LeadSoc Technologies Pvt Ltd; Bengaluru; On-site; INR 4,200,000 - 6,200,000; Full time

Job summary

LeadSoc Technologies Pvt Ltd in Bengaluru, Karnataka seeks a Memory Design Lead with 10+ years of hands-on SRAM and MRAM design to steer memory IP development from architecture through silicon validation and production release.

The candidate will define memory architectures, develop SRAM/MRAM bitcells and peripherals, optimize sense amps, decoders, and timing logic, and mentor memory design engineers while collaborating with Architecture, PD, DFT, Product Engineering and Process teams.

Qualifications

• 10+ years of industry experience in SRAM and/or MRAM design.
• BS/MS in Electrical/Electronics Engineering or related field.
• Proven track record of taking memory IP from architecture/concept through silicon and production.
• Strong hands-on expertise in custom circuit design and SPICE-based analysis.
• Experience with advanced CMOS/FinFET technology nodes.
• Strong understanding of memory robustness, variability, PVT corners, and silicon characterization.
• Demonstrated ability to technically lead complex memory development programs.

Responsibilities

• Own the memory IP lifecycle from architecture to production release.
• Define memory architectures and develop SRAM/MRAM bitcells and peripheral circuits.
• Design and optimize sense amplifiers, write drivers, decoders, timing/control logic, reference-generation circuits.
• Drive Power, Performance, and Area (PPA) optimization across memory macros while maintaining robust operation across PVT corners.
• Perform read/write margin, retention, variability, mismatch, and Monte Carlo analysis.
• Lead silicon bring-up, characterization, failure analysis, simulation-to-silicon correlation, and yield improvement.
• Analyze silicon failures and drive root-cause identification and corrective actions across design, technology, and process dimensions.
• Work closely with Architecture, Physical Design, DFT, Product Engineering, and Technology/Process teams to deliver production-ready memory IP.
• Provide technical direction, review designs, establish methodologies, and mentor memory design engineers.

Skills

Memory IP development

Technical leadership

Mentoring engineers

Cross-functional collaboration

Education

BS/MS in Electrical/Electronics Engineering

Tools

SPICE simulations

Monte Carlo analysis

PVT analysis

Characterization tools

Job description

We are looking for an experienced Memory Design Lead with 10+ years of hands-on experience in SRAM and/or MRAM design to lead memory IP development from architecture definition through circuit design, silicon validation, characterization, and production release.

The ideal candidate will have deep expertise in custom memory circuits, memory peripherals, SPICE simulation, PVT/Monte Carlo analysis, margin characterization, and silicon debug, along with a strong track record of delivering production-quality memory IP.

Key Responsibilities

• Own the complete memory IP lifecycle from architecture and circuit design to silicon validation and production release.
• Define memory architectures and develop robust, high-performance SRAM/MRAM bitcells and peripheral circuits.
• Design and optimize sense amplifiers, write drivers, decoders, timing/control logic, reference-generation circuits, and related peripherals.
• Drive Power, Performance, and Area (PPA) optimization across memory macros while maintaining robust operation across PVT corners.
• Perform read/write margin, retention, variability, mismatch, and Monte Carlo analysis.
• Lead silicon bring-up, characterization, failure analysis, simulation-to-silicon correlation, and yield improvement.
• Analyze silicon failures and drive root-cause identification and corrective actions across design, technology, and process dimensions.
• Work closely with Architecture, Physical Design, DFT, Product Engineering, and Technology/Process teams to deliver production-ready memory IP.
• Provide technical direction, review designs, establish methodologies, and mentor memory design engineers.

Required Qualifications

• 10+ years of industry experience in SRAM and/or MRAM design.
• BS/MS in Electrical/Electronics Engineering or a related field.
• Proven track record of taking memory IP from architecture/concept through silicon and production.
• Strong hands-on expertise in custom circuit design and SPICE-based analysis.
• Experience working with advanced CMOS/FinFET technology nodes.
• Strong understanding of memory robustness, variability, PVT corners, and silicon characterization.
• Demonstrated ability to technically lead complex memory development programs.

Preferred Qualifications

• Experience with MBIST, BISR, ECC, redundancy and repair schemes.
• Knowledge of memory yield enhancement and production screening methodologies.
• Experience with advanced SRAM/MRAM technologies and high-density memory macros.
• Strong cross-functional leadership across Design, Technology, DFT, PD, Product, and Validation teams.
• Proven experience mentoring engineers and driving technical direction.