Sr. Principal Design Engineer

Cadence Design Systems; Hyderabad; On-site; INR 1,800,000 - 2,600,000; Full time

Job summary

Cadence Design Systems in Hyderabad is seeking an experienced SRAM Circuit Design Engineer to join our semiconductor engineering team, focusing on low power, low voltage, and high performance memory blocks.

You will lead full-custom or compiler-based SRAM macros, run SPICE simulations, and coordinate with layout teams while supporting post-silicon validation. Cadence offers a collaborative environment with access to cutting-edge tools for memory design.

Qualifications

• Education: B.Tech/M.Tech in Electrical Engineering, VLSI, or Microelectronics.
• Experience: Typically ranges from 6 to 18 years depending on level.
• Core knowledge: CMOS device physics, transistor sizing, memory cell stability.
• Tools: Cadence Virtuoso or SPICE simulators.
• Scripting: Python or Perl for automation and data analysis.

Responsibilities

• Circuit Design & Optimization: Build full-custom or compiler-based SRAM macros, sense amplifiers, and self-timed circuits.
• Simulation & Characterization: Run SPICE simulations to analyze timing, power, and Static Noise Margin (SNM) across process corners.
• Layout Supervision: Direct physical design and layout teams to handle process variability and FinFET manufacturing rules.
• Silicon Validation & Debug: Support post-silicon testing and troubleshooting hardware failures

Skills

Memory design

SRAM design

CMOS physics

Python scripting

Cadence Virtuoso

SPICE sims

Education

B.Tech/M.Tech in Electrical Engineering

Tools

Cadence Virtuoso

SPICE

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

1. Role Overview & Objective

We are looking for a motivated SRAM Circuit Design Engineer to join our semiconductor engineering team developing circuits and SRAM/Register File for low power, low voltage and high performance. This role is ideal for candidates who are passionate about memory design, characterization methodologies, and physical verification, and who are eager to build a strong foundation in VLSI memory development.

2. Key Responsibilities

• Circuit Design & Optimization: Build full-custom or compiler-based SRAM macros, sense amplifiers, and self-timed circuits.
• Simulation & Characterization: Run SPICE simulations to analyze timing, power, and Static Noise Margin (SNM) across process corners.
• Layout Supervision: Direct physical design and layout teams to handle process variability and FinFET manufacturing rules.
• Silicon Validation & Debug: Support post-silicon testing and troubleshooting hardware failures

3. Required Qualifications & Experience

Education: B.Tech/M.Tech in Electrical Engineering, VLSI, or Microelectronics.

Experience: Typically ranges from 6 to 18 years depending on whether the role is entry/mid-level or a senior lead/architect position.

Core Knowledge: Deep understanding of CMOS device physics, transistor sizing, and memory cell stability.

Tools: Proficiency in EDA software like Cadence Virtuoso or SPICE simulators.

Scripting: Ability to use Python or Perl for workflow automation and data analysis.

4. Behavioral & Soft Skills

Strong analytical and problem-solving skills. High attention to detail. Ability to collaborate cross-functionally with circuit designers, architecture teams, and CAD engineers.

We’re doing work that matters. Help us solve what others can’t.

Equal Employment Opportunity Policy: Cadence is committed to equal employment opportunity throughout all levels of the organization.

We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact [e-mail].

Privacy Policy: Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy.

E-Verify Cadence participates in the E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify.

All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For.

Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.

Cadence is proud to be an equal opportunity employer.