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Myraid is seeking a seasoned analog/mixed-signal design engineer in Bengaluru to own the integration of IPs such as ADC/DAC, PLL, bandgap and SerDes within an SoC. You will design and simulate across PVT variations and Monte Carlo runs.
With 5–10 years of hands-on analog/mixed-signal design experience, you will guide layout, assist top-level verification, silicon bring-up and customer reviews using Cadence Virtuoso/Spectre and Calibre.
Own SoC integration of analog/mixed-signal IP. Design and simulate ADC/DAC, PLL, bandgap and SerDes blocks across PVT, Monte Carlo and post-layout. Guide layout, support top-level verification, silicon bring-up and customer reviews.
B.E/B.Tech/M.Tech in Electronics/VLSI with 5-10 yrs in analog/mixed-signal design. Hands-on SoC integration, ADC/DAC, PLL, bandgap, SerDes. Cadence Virtuoso/Spectre, Calibre. Tape‑out a plus.