Hardware Design and Power Electronics-2586

Tessolve

Bengaluru

On-site

INR 3,000,000 - 5,500,000

Full time

4 days ago
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Job summary

Tessolve in Bengaluru, India seeks an experienced Hardware System Lead with deep expertise in power electronics and high-power test hardware. You will oversee system-level design, review switching behavior of SiC MOSFETs and IGBTs, and guide gate-driver, protection and interface strategies for dynamic test benches.

You will support bring-up, debugging, validation planning and robustness testing for high-power test systems, ensuring safe operation and readiness for automated tests.

Qualifications

  • 7–10 years of experience in power electronics hardware design and high-power test instrumentation.
  • Strong knowledge of SiC MOSFET/IGBT switching, gate drivers, DC-link, protection, and transient effects.
  • Experience in schematic review, interface definition, signal-conditioning review, isolation review, board bring-up, hardware debugging and validation.
  • Ability to define test sequences and hardware-state transitions for automated test execution, including fault handling.
  • Good understanding of parasitic inductance/capacitance, grounding, cable/connector selection, signal integrity and EMC/EMI.

Responsibilities

  • Lead system-level understanding and review of high-power semiconductor test hardware, including power paths, energy storage, switching stages, protection circuits and control interfaces.
  • Analyze DC-link capacitor banks, pre-charge/discharge circuits, load inductors, snubber circuits, high-current switching paths and safe energy handling during normal and fault conditions.
  • Review SiC MOSFET / IGBT switching behavior, including dv/dt, di/dt, voltage overshoot, ringing, parasitic-loop impact and safe operating margin.
  • Review gate-driver design including gate voltage levels, ON/OFF gate resistance, Miller clamp, negative gate bias, DESAT/overcurrent protection, soft shutdown, isolation and CMTI margin.
  • Analyze and improve fast protection circuits for high-energy test conditions, including short-circuit protection, dI/dt and dV/dt-based fault detection, fault latch/reset and safe shutdown strategy.
  • Define hardware interface requirements for control boards and automation systems, including signal conditioning, isolation, level shifting, relay/switch drive, feedback signals, interlocks and diagnostics.
  • Support board-level and system-level bring-up, debugging, root-cause analysis, validation planning and robustness testing for high-power test systems.

Skills

Power electronics
High-voltage systems
SiC MOSFETs
IGBT switching
Gate drivers
Protection design
System validation
Test bench design
Debugging
Parasitics & EMI

Tools

LTspice
PLECS
MATLAB/Simulink
Altium
Cadence
Mentor

Job description

Role Summary

We are looking for an experienced Hardware System Lead with strong expertise in power electronics, SiC MOSFET switching systems, high-voltage/high-current hardware design, gate-driver circuits, protection design, hardware interfaces and validation. The role supports development and validation of dynamic power semiconductor test benches used for short-circuit, double/multi-pulse and unclamped inductive load test scenarios.

Key Responsibilities
  • Lead system-level understanding and review of high-power semiconductor test hardware, including power paths, energy storage, switching stages, protection circuits and control interfaces.
  • Analyze DC-link capacitor banks, pre-charge/discharge circuits, load inductors, snubber circuits, high-current switching paths and safe energy handling during normal and fault conditions.
  • Review SiC MOSFET / IGBT switching behavior, including dv/dt, di/dt, voltage overshoot, ringing, parasitic-loop impact and safe operating margin.
  • Review gate-driver design including gate voltage levels, ON/OFF gate resistance, Miller clamp, negative gate bias, DESAT/overcurrent protection, soft shutdown, isolation and CMTI margin.
  • Analyze and improve fast protection circuits for high-energy test conditions, including short-circuit protection, dI/dt and dV/dt-based fault detection, fault latch/reset and safe shutdown strategy.
  • Define hardware interface requirements for control boards and automation systems, including signal conditioning, isolation, level shifting, relay/switch drive, feedback signals, interlocks and diagnostics.
  • Support board-level and system-level bring-up, debugging, root-cause analysis, validation planning and robustness testing for high-power test systems.
Required Qualifications & Skills
  • 7–10 years of experience in power electronics hardware design, high-voltage/high-current systems, semiconductor test hardware or high-power test instrumentation.
  • Strong knowledge of SiC MOSFET and IGBT switching behavior, gate drivers, DC-link design, protection circuits, transient effects and energy-flow analysis.
  • Experience in schematic review, interface definition, signal-conditioning review, isolation review, board bring-up, hardware debugging and system-level validation.
  • Ability to define test sequences and hardware-state transitions for automated test execution, including fault handling and safe-state behavior.
  • Good understanding of parasitic inductance/capacitance effects, grounding, cable/connector selection, signal integrity and EMC/EMI considerations in power electronics systems.
Good to Have
  • Exposure to dynamic semiconductor test methods such as double-pulse testing, short-circuit testing, multi-pulse testing, UIL/avalanche testing and high-current pulse testing.
  • Awareness of safety/interlock systems, CE/SEMI compliance readiness and validation practices for high-power equipment.
  • Familiarity with tools such as LTspice, PLECS, MATLAB/Simulink, Altium, Cadence, Mentor or equivalent schematic/PCB review environments.
Expected Deliverables
  • Hardware architecture review, power path and energy-flow analysis, gate-driver/protection review, interface requirements, validation plan, debug reports and design-improvement recommendations.
Role Impact

This role is critical for ensuring safe, reliable and robust operation of high-power SiC MOSFET dynamic test platforms by improving protection reliability, switching performance, hardware robustness and readiness for automated test execution.

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