FPGA Systems Engineer

Chinnolla Enterprises; Hyderabad, Pune District, Bengaluru; On-site; INR 2,500,000 - 4,500,000; Full time

Benefits offered by this job

Competitive compensation

Advanced R&D projects

Job summary

Chinnolla Enterprises in Hyderabad, India seeks an experienced FPGA/RTL engineer to design real-time signal processing hardware. You will write Verilog/VHDL/SystemVerilog for Xilinx devices, implement DSP, and integrate high-speed ADC/DAC interfaces with emphasis on timing closure and hardware bring-up.

The candidate should have 5+ years FPGA/RTL development, strong HDL skills, and hands-on debugging across hardware/software in advanced R&D projects. Competitive compensation is offered.

Qualifications

• 5+ years FPGA/RTL development.
• Strong Verilog/VHDL/SystemVerilog, Xilinx, preferably Zynq/Zynq UltraScale+.
• Experience in DSP, ADC/DAC, timing closure, CDC, simulation, hardware bring-up and debugging

Skills

Verilog/VHDL/SystemVerilog

Xilinx

DSP

Timing closure

Hardware debugging

Tools

Vivado

ModelSim

Job description

Design and develop FPGA systems for real-time signal processing, precision instrumentation and control. Develop Verilog/VHDL RTL, implement DSP, interface high-speed ADC/DAC, perform timing closure, hardware debugging and system integration.

Required Candidate profile

5+ years FPGA/RTL development. Strong Verilog/VHDL/SystemVerilog, Xilinx, preferably Zynq/Zynq UltraScale+. Experience in DSP, ADC/DAC, timing closure, CDC, simulation, hardware bring-up and debugging

Perks and benefits

• Competitive compensation | Advanced R&D projects