FPGA DSP Engineer

Incise Infotech Pvt. Ltd.; Dadri; On-site; INR 600,000 - 900,000; Full time

Job summary

Incise Infotech Pvt. Ltd. is seeking a knowledgeable engineer specializing in RTL coding (VHDL/Verilog) and Digital Signal Processing. The successful candidate will work on developing and validating complex algorithms for FPGA design, focusing on wireless communication protocols.

Essential skills include proficiency in FPGA tools and a strong understanding of DSP concepts. Team collaboration and effective communication of technical details are crucial. This role offers an opportunity to work on innovative signal processing projects.

Qualifications

• Proficiency in RTL coding (VHDL/Verilog) for FPGA design.
• Strong understanding of Digital Signal Processing concepts.
• Experience with Wireless Communication protocols and algorithms.

Responsibilities

• Develop and validate RTL code for digital signal processing applications.
• Implement communication algorithms on FPGA hardware.
• Collaborate with team members to integrate DSP in embedded systems.

Skills

RTL coding (VHDL/Verilog)

Digital Signal Processing( FFT/IFFT, Filter Design)

Wireless Communication protocols

FPGA tools (Xilinx Vivado, Intel Quartus, ModelSim)

High-speed data interfaces (AXI, PCIe, DDR, Ethernet)

Tools

MATLAB/Simulink

Job description

RTL coding (VHDL/Verilog) Digital Signal Processing( FFT/IFFT Filter Design Convolution Cross Correlation Auto-Correlation) Wireless Communication protocols and algorithms

Job Description

• Mandatory:Proficiency inRTL coding (VHDL/Verilog)for FPGA design.
• Strong understanding ofDigital Signal Processing( FFT/IFFT, Filter Design, Convolution, Cross Correlation, Auto-Correlation)concepts.
• Experience inWireless Communication protocols and algorithms (Digital Modulation Scheme, Encoding-Decoding, Channel Estimation ).
• Hands-on experience with FPGA tools such asXilinx Vivado, Intel Quartus, ModelSim, or similar.
• Knowledge ofhigh-speed data interfaces (AXI, PCIe, DDR, Ethernet, etc.).
• Experience withMATLAB/Simulink (Optional)forDSPalgorithm validation.
• Exposure toSDR (Software-Defined Radio) or RF signal processing.
• Familiarity with FPGA-based accelerators and embedded system integration.
• Ability to work in a team and effectively communicate technical concepts.