FPGA Prototyping & Emulation Developer - SMTS/MTS

1840 Micron Tech. OP India LLP

Bengaluru

On-site

INR 1,500,000 - 2,000,000

Full time

14 days+
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Job summary

1840 Micron Tech. OP India LLP is looking for an experienced FPGA Prototyping & Emulation Engineer in Bengaluru, India. You will design, build, and scale FPGA-based platforms for next-gen memory-centric solutions. The role requires expertise in RTL, system integration, and debug to accelerate time-to-market for complex silicon programs.

Candidates should have 10-20+ years of experience in FPGA design and a solid understanding of various integration techniques and protocols. A degree in Electrical/Electronics Engineering is required.

Qualifications

  • 10-20+ years of experience in FPGA Design/FPGA Prototyping.
  • Good understanding of RTL Integration, system architecture, and verification methodologies.
  • Strong debugging and problem-solving skills.

Responsibilities

  • Develop and maintain FPGA prototypes/emulation environments for SoC/IP validation.
  • Integrate and validate various interfaces such as PCIe and USB.
  • Debug system-level issues across RTL/integration.

Skills

FPGA Design/Prototyping
RTL Integration
SystemVerilog
Verilog
Debugging
Python
TCL
High-speed protocols (PCIe, UFS)

Education

Bachelor’s or Master’s degree in Electrical/Electronics Engineering
PhD in related field

Job description

Role Type: SMTS/MTS Domain: Memory-Centric FPGA Prototyping & Emulation | DDRx/LPDDRx Integration | System Debug & Validation

Role Summary

As an FPGA Prototyping & Emulation Engineer, you will design, build, and scale FPGA-based platforms to enable next-gen memory-centric solutions. You will work across RTL, system integration, and debug to accelerate time-to-market for complex silicon programs.

Key Responsibilities
  • FPGA Prototyping & Emulation
    • Develop and maintain FPGA prototypes/emulation environments for SoC/IP validation
    • Perform RTL integration, partitioning, synthesis, and timing closure
    • Support multi-FPGA bring-up and scalability for large SoCs
  • Interface & System Integration
    • Integrate and validate interfaces such as PCIe, USB, UFS, Ethernet (EMAC), I2C, SPI, UART
    • Enable memory controller development and interfacing
    • Enable DDR/memory subsystem integration in prototyping environments
    • Collaborate with design teams to ensure functional correctness and performance alignment
  • Debug & Bring-Up
    • Debug system-level issues across RTL/integration, clocks, resets, CDC, firmware/software interactions
    • Support early software bring-up and system validation on FPGA platforms
    • Build debug visibility (probes, traces, instrumentation)
  • Automation & Flow Optimization
    • Improve prototyping/emulation flow efficiency (build, deploy, validate cycles)
    • Develop automation using Python / Tcl for regression runs, platform configuration, debug trace collection
Minimum Qualifications
  • 10 -20+ years of experience in FPGA Design/FPGA Prototyping (A Must)
  • Good understanding of RTL Integration, SystemVerilog, Verilog, Timing Closure, STA, CDC, Multi-FPGA
  • Familiarity with memory controller, DDR interfaces and memory subsystem integration
  • Familiarity with high-speed and low speed protocols such as PCIe, UFS, USB, EMAC, I2C, SPI, UART
  • Good understanding of SoC architecture and verification methodologies
  • Strong debugging and problem-solving skills
  • Experience with scripting languages (Python, TCL) for automation
  • Exposure to software bring-up on FPGA/emulation platforms
Basic Qualifications
  • Bachelor’s or Master’s degree in Electrical/Electronics Engineering or related field with 10+ years of experience, OR PhD with 10+ years of experience.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

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