Emulation and Prototyping Senior Engineer

Mirafra Technologies; Pune District; On-site; INR 1,500,000 - 2,000,000; Full time

Job summary

Mirafra Technologies is seeking an experienced FPGA Engineer in Pune, India, with 8-15 years of hands-on experience in FPGA-based prototyping and emulation. The candidate will develop and maintain validation platforms, integrate RTL blocks on FPGA platforms, and collaborate with design teams to optimize resource usage. A Bachelor’s or Master’s degree in Electrical Engineering is required, along with proficiency in Verilog/System Verilog and scripting languages. Experience with industry-standard emulation platforms is a plus.

Qualifications

• 8-15 years of hands-on experience in FPGA prototyping or emulation.
• Strong understanding of digital design fundamentals and RTL.
• Good problem-solving and debugging skills.

Responsibilities

• Develop and maintain FPGA-based prototyping platforms for pre-silicon validation.
• Integrate and debug RTL blocks on FPGA platforms.
• Collaborate with design and verification teams.

Skills

FPGA prototyping

Digital design fundamentals

Verilog/System Verilog

Circuit debugging

Scripting (Python, Tcl)

Education

Bachelor's or Master's degree in Electrical Engineering

Tools

Vivado

Quartus

Palladium

Job description

Hands on experience, handling large system FPGA prototyping, on Xilinx FPGAs (XCVU9P or above) is must

Job Description

• FPGA-based Pre‑Silicon validation Platform development for IP and Subsystems
• IP/SS Design porting and implementation for FPGA
• Development & bring‑up of Pre‑Silicon Validation platforms like HAPS‑100/Veloce / Palladium/ZeBU or FPGA for the IP/SOC Validation
• Development and execution of system use case scenarios
• Ability to work well as part of a team Knowledge/Skills
• 8‑15 years of experience in developing FPGA‑based prototype platforms for multi‑million gate IP/Subsystem/SoC
• Should be able to understand system level environment for MicroControllers
• Planning Test strategy, creating test plan, and test code development to address functional and performance requirements of the IP/Subsystem.
• Experience with Verilog/System Verilog/VHDL and working knowledge of C/C++
• Working knowledge of one more of the industry standard Emulation platforms like Veloce / HAPS / Palladium platform
• Experience in working on ARM/RISC‑V core architectures would be an advantage.

Key Responsibilities

• Develop and maintain Emulation / FPGA-based prototyping platforms for pre‑silicon validation.
• Integrate and debug RTL blocks on FPGA platforms (e.g., Xilinx, Intel/Altera).
• Collaborate with design and verification teams to bring up emulation environments.
• Optimize FPGA resource usage and timing closure for large‑scale designs.
• Support software teams with early access to hardware through emulation/prototyping.
• Automate build and deployment flows using scripting languages (Python, Tcl, Shell).
• Document design flows, debug procedures, and provide training/support to internal teams.

Technical skill Required

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
• 8‑15 years of hands‑on experience in FPGA prototyping or emulation.
• Strong understanding of digital design fundamentals and RTL (Verilog/SystemVerilog).
• Experience with FPGA tools such as Vivado, Quartus, Synplify, or similar.
• Familiarity with at least some of the emulation platforms like Veloce, HAPS‑100, Palladium or Zebu is a important.
• Proficiency in scripting languages (Python, Perl, Tcl).
• Good problem‑solving and debugging skills.
• Excellent communication and teamwork abilities.