FPGA Engineer III

Big Bang Boom Solutions Private Limited; Chennai District; On-site; INR 900,000 - 1,300,000; Full time

Job summary

Big Bang Boom Solutions Private Limited in Chennai, India seeks an experienced FPGA/RTL engineer to design and dock RTL using VHDL, develop SDR systems on FPGA with Xilinx Vivado, and ensure timing closure. You will implement DSP blocks, work with RF front-end integrations, and support verification with UVM when needed.

The role requires collaboration with RF, hardware and software teams, strong debugging skills with oscilloscope and logic analyzer, and proficient Python scripting for automation.

Qualifications

• 5+ years of relevant industry experience.
• Hands-on FPGA and RTL development using VHDL.
• Experience with FPGA timing, XDC constraints, and SDR systems.

Responsibilities

• Design and implement RTL using VHDL
• Develop and debug FPGA-based SDR systems using Xilinx Vivado
• Perform timing analysis, XDC constraints, and timing closure
• Implement DSP blocks and signal processing algorithms
• Work with communication protocols (Ethernet, high-speed interfaces)
• Integrate FPGA with RF front-end (ADC/DAC, AD9361/AD9364)
• Support verification (UVM preferred)
• Debug hardware using oscilloscope and logic analyzer
• Use Python for automation and testing
• Collaborate with RF, hardware, and software teams

Skills

Xilinx Vivado

FPGA design

VHDL

RTL design

DSP blocks

Timing analysis

UVM

Python scripting

Ethernet / high-speed interfaces

Tools

Oscilloscope

Logic analyzer

Job description

5+ years of relevant industry experience

Education

Key Responsibilities

• Design and implement RTL using VHDL
• Develop and debug FPGA-based SDR systems using Xilinx Vivado
• Perform timing analysis, XDC constraints, and timing closure
• Implement DSP blocks and signal processing algorithms
• Work with communication protocols (Ethernet, high-speed interfaces)
• Integrate FPGA with RF front-end (ADC/DAC, AD9361/AD9364)
• Support verification (UVM preferred)
• Debug hardware using oscilloscope and logic analyzer
• Use Python for automation and testing
• Collaborate with RF, hardware, and software teams

Required Skills

• Good understanding of digital logic and communication systems
• Hands-on experience with Xilinx Vivado
• Knowledge of timing closure and FPGA constraints
• Familiarity with DSP and SDR-based system design
• Basic knowledge of drone RF signals / detection
• Experience in lab debugging
• Good communication and problem-solving skills