FPGA Emulation Engineer

Larsen & Toubro Ltd; Bengaluru; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

Larsen & Toubro Ltd in Bengaluru seeks an Engineer for Emulation roles to support FPGA-based SoC prototyping and hardware emulation for next-generation semiconductor products. You will contribute to RTL prep, synthesis, implementation, and validation under senior guidance, working with platforms like HAPS and ZeBu to aid pre-silicon validation and co-verification.

You will collaborate with Design Verification, RTL Design, Firmware and Software teams to resolve issues, while contributing to

Qualifications

• Experience with FPGA prototyping and emulation workflows.
• Knowledge of RTL design, FPGA synthesis, place-and-route and bitfile generation.
• Ability to analyze timing and resource reports and support optimizations.
• Basic scripting in Python, Tcl, Perl or Shell for automation.

Responsibilities

• FPGA Prototyping and Emulation: support RTL prep, synthesis, implementation, compilation and validation.
• Synthesis and Implementation: perform FPGA synthesis, P&R and bitfile generation.
• Platform Bring-up: assist board setup, JTAG connectivity, clock/reset config and validation.
• Emulation Compilation: support emulator builds and model bring-up on ZeBu or similar platforms.
• Timing and Resource Analysis: review timing reports and resource utilization to identify bottlenecks.
• Interface Validation: verify basic connectivity of SPI, I2C, UART, GPIO and Ethernet peripherals.
• Debug and Issue Resolution: initial debugging of compilation and runtime issues; escalate when needed.
• Hardware/Software Co-verification: support firmware execution and system validation on prototypes.
• Regression and Validation: run tests, track results and maintain validation records.
• Automation: write scripts to automate builds, logs, reports and repetitive tasks.
• Cross-functional Collaboration: work with RTL, Verification, Firmware, Software and senior engineers.
• Documentation and Reporting: maintain logs, validation results and setup documentation.

Skills

FPGA prototyping

RTL preparation

Python scripting

Debugging

Tools

Synopsys ZeBu

HAPS

FPGA tooling suite

Job description

Engineer - Emulation Role Summary Support FPGA-based SoC prototyping and hardware emulation activities for next-generation semiconductor products. Contribute to RTL preparation, FPGA synthesis, implementation, emulation compilation, platform bring-up, validation, and debugging under the guidance of senior engineers. Work with platforms such as HAPS and Synopsys ZeBu to support pre-silicon validation and hardware/software co-verification. Collaborate with Design Verification, RTL Design, Firmware, and Software teams to resolve implementation and functional issues while contributing to automation, infrastructure maintenance, and improvements in verification turnaround time.

Roles & Responsibilities

• FPGA Prototyping and Emulation: Support FPGA prototyping and emulation workflows, including RTL preparation, synthesis, implementation, compilation, model bring-up, and validation.
• Synthesis and Implementation: Execute FPGA synthesis, place-and-route (P&R), and bitfile generation. Analyze build reports and assist in resolving implementation issues.
• Platform Bring-up: Support FPGA board setup, bitfile programming, JTAG connectivity, clock/reset configuration, and basic hardware validation.
• Emulation Compilation: Assist with emulator compilation, model configuration, and bring-up on platforms such as Synopsys ZeBu, following established workflows.
• Timing and Resource Analysis: Analyze timing reports, FPGA resource utilization, and implementation results to identify bottlenecks and support optimization activities.
• Interface and Connectivity Validation: Validate basic connectivity and functionality of interfaces such as SPI, I2C, UART, GPIO, MDIO, Ethernet, and other SoC peripherals, as applicable.
• Debug and Issue Resolution: Perform initial debugging of compilation, connectivity, timing, and runtime issues using logs, waveform viewers, and available FPGA debug tools. Escalate complex issues to senior engineers.
• Hardware/Software Co-verification: Support firmware execution and system-level validation on FPGA prototypes and emulators, including boot, memory access, register programming, and peripheral functionality.
• Regression and Validation: Execute assigned tests, monitor regression results, analyze failures, and maintain validation status and issue-tracking records.
• Automation and Productivity: Develop basic scripts using Python, Tcl, Perl, or Shell to automate build execution, log analysis, report generation, and repetitive engineering tasks.
• Cross-functional Collaboration: Work with RTL Design, Design Verification, Firmware, Software, and senior Emulation engineers to support integration, debugging, and prototype readiness.
• Documentation and Reporting: Maintain build logs, configuration details, validation results, debug notes, and setup documentation. Communicate progress, blockers, and technical issues to the team.
• Methodology and Skill Development: Follow established engineering flows and contribute to process improvements while developing expertise in FPGA implementation, emulation, timing analysis, and system-level debugging.