FPGA design & prototyping

Acldigital; Bengaluru; On-site; INR 1,000,000 - 1,400,000; Full time

Job summary

A leading digital solutions company in Bengaluru seeks a skilled FPGA Designer with over 4 years of experience. The candidate will create PL designs and work with Xilinx/AMD devices. Proficiency in scripting languages such as TCL, Shell, or Python is essential. A B-Tech degree is required, along with responsibilities like documentation and maintaining regressions. This role offers a chance to contribute to innovative projects in a collaborative environment.

Qualifications

• 4+ years experience in FPGA designs.
• Experience in PL design creation.
• Good knowledge of scripting languages like TCL, Shell, or Python.

Responsibilities

• Create and update XAPP documents.
• Maintain ROAST regressions based on Python for BFR scripts.

Skills

FPGA design

PL design creation

Scripting languages (TCL/Shell/Python)

RTL coding

Vitis flows

Education

B- Tech

Tools

Xilinx/AMD devices

Job description

ACL Digital is a design-led Digital Experience, Product Innovation, Solutions, and Consulting offerings leader. From strategy, to design, implementation, and management we help accelerate innovation and transform businesses. Keeping customer journeys and design at the core, it is committed to enable large Enterprises, SMBs and start-ups to transform. A pioneer in delivering Business Innovation, Integration and Transformation through disruptive technologies, ACL Digital brings in competitive advantage, innovation, and fresh perspectives to business challenges. With a multi-cultural and transnational talent and as part of the ALTEN Group comprising over 37,000 employees spread across more than 25 countries, it promotes a collaborative knowledge-building environment.

Roles and Responsibilities

Experience Level : 4+ years on FPGA designs

• 4+ years of experience in PL design creation.
• Working knowledge on Xilinx/AMD devices.
• Working experience on any scripting language (TCL/Shell/Python).
• Good to have experience in RTL coding.
• Good to have experience in Vitis flows.
• Responsible for creating and updating XAPP documents.
• Responsible for creating and maintaining ROAST regressions (based on Python) for BFR scripts.

Qualification : B- Tech

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