Field-Programmable Gate Arrays Engineer

Tonbo Imaging; Bengaluru Urban; On-site; INR 800,000 - 1,200,000; Full time

Job summary

A leading imaging technology company is seeking an Onboarding Specialist and HR Generalist with experience in developing UVM-based verification environments for FPGA RTL blocks. You will write comprehensive test plans, analyze simulation failures, and collaborate with engineers to ensure functional correctness. The ideal candidate will have skills in SystemVerilog assertions and tools like QuestaSim or ModelSim. This full-time position is based in Bengaluru Urban, Karnataka, India.

Qualifications

• Experience in developing UVM-based verification environments.
• Ability to write comprehensive test plans.
• Familiarity with debugging RTL and analyzing simulation failures.

Responsibilities

• Develop verification environments for FPGA RTL blocks.
• Analyze simulation failures and debug RTL.
• Collaborate with designers and engineers for requirement understanding.

Tools

QuestaSim

ModelSim

Vivado

Job description

Human Resource | Ex-Amazonian | Onboarding Specialist | HR Generalist

Develop UVM-based verification environments for FPGA RTL blocks and subsystems.

Write comprehensive test plans, and implement stimulus, checkers, monitors, and scoreboards.

Ensure functional correctness via SystemVerilog assertions, constrained-random testing, and coverage closure.

Analyze simulation failures and debug RTL with tools like QuestaSim/ModelSim/Vivado and waveform viewers.

Collaborate with RTL designers and systems engineers to understand requirements and corner cases.

Participate in code reviews, design documentation, and DO-254 verification artifacts.

Contribute to integration and validation efforts on target hardware platforms (Xilinx/Intel FPGAs).

Seniority level

• Associate

Employment type

• Full-time

Job function

• Defense and Space Manufacturing

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