Electro-Magnetic Design Engineer

Qualcomm; Bengaluru; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

Qualcomm India Private Limited in Bangalore, India is seeking engineers with demonstrated experience in the design, EM simulation, and circuit modeling of RF passive components for use in advanced RFIC designs. Candidates should be comfortable working across multiple domains including antenna, PDN, and packaging considerations to ensure high‑performance results.

Responsibilities include designing and developing inductors, transformers, capacitors, and filters for deep sub‑micron CMOS/SOI

Qualifications

• Experience in design and simulation of RF passive components (inductors, transformers, capacitors, filters).
• Familiarity with EM simulation tools (HFSS, MoM solvers) and circuit design/layout tools (Cadence, ADS).
• Knowledge of RF packaging, PDN, antennas, and signal/power integrity across chip/package/PCB levels.

Responsibilities

• Design and develop RF passive components for next‑gen RFICs in deep sub‑micron CMOS/SOI technologies.
• Collaborate with circuit design team to optimize sizes and performance for on‑chip RF blocks.
• Deliver compact models and LEMs, and support RF package/module/PCB modeling to optimize system performance.
• Conduct isolation analysis and optimization to minimize coupling within chip and package.

Skills

RF design

EM simulation

PDN understanding

Education

Bachelor’s degree in Electrical/Electronics Engineering or related field

Master’s degree

PhD

Tools

HFSS

Q3D

SiWave

Cadence Virtuoso

Allegro

Expedition

ADS

EMX

Job description

Company

Qualcomm India Private Limited

Location

Bangalore, India

Job Overview

Qualcomm is the industry leader in 3G, 4G and 5G communication technology and designs the most advanced radio technology in the commercial wireless marketplace, from 5G/6G to Bluetooth. QCT's RF Electro-Magnetic (EM) Design Team is actively seeking engineers with demonstrated experience in the design, EM simulation, and circuit modeling of RF passive components for use in our RFIC designs. Exposure to RF package, module, and PCB design and modeling is a plus. Knowledge of PCB‑level Power Distribution Network (PDN) and RF transmission line layout and analysis is an asset. Working experience and knowledge of Power Amplifier (PA) and Low Noise Amplifier (LNA) matching is an advantage. Basic understanding of patch antenna design parameters and matching is also desired.

Minimum Qualifications

• Bachelor’s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
• Master’s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Responsibilities

• Design and develop RF passive components for use in the next generation of highly integrated RF integrated circuits in deep sub‑micron 28nm/14nm/6nm/2nm CMOS and SOI technologies.
• Work with the circuit design team to optimize component sizes and performance for use in on‑chip RF circuit blocks.
• Deliver components that include compact models, and DRC clean physical designs.
• Execute isolation analysis and optimization to reduce on‑chip and chip‑to‑package coupling.
• Optimization of multichip carriers for RF systems, focusing on loss and isolation.
• Participate in RF package, module, and PCB modeling to optimize overall system performance.

Skills and Experience

• Experience in the design and simulation of RF passive components such as inductors, transformers, MOM/MIM capacitors and passive filters.
• Demonstrated abilities with EM simulation techniques and tools including MoM EM solvers and HFSS.
• Experience with circuit design and layout using Cadence tools and Agilent ADS.
• Compact RLCK model extraction of multiport passive components.
• Ability to use EM tools to predict circuit‑level electric and magnetic coupling.
• Understanding of chip fabrication processes and design.
• Electromagnetic theory, microwave theory and design.
• Antenna design and understanding of radiation and propagation waves.
• Good understanding of SI and PI at chip, package, and PCB level.
• Basic RF system understanding.
• Understanding of noise propagation mechanisms in chip, package, and PCB.
• Tools: Ansys Suite (HFSS, Q3D, SiWave, Layout), Lorentz, Helic, EMX, Cadence Virtuoso, Allegro or similar for package/module layout, Expedition (or similar) for PCB layout and schematic, VRF.
• Passionate self‑starter and team player with experience in project leadership and multi‑tasking.

Keywords

On‑chip passive, inductors, transformers, MOM/MIM capacitors, antennas, signal and power integrity, PDN, substrate coupling, RF module, RF package modeling, HFSS, Ansys, ADS, VRF.

Educational Requirements

• Required: Bachelor’s degree in science, engineering, or related field.
• Preferred: Master’s and PhD.

Applicants

Qualcomm is an equal‑opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, please contact Qualcomm's disability accommodations at disability‑[e-mail] or call Qualcomm's toll‑free number. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities in the hiring process.

Contact

If you would like more information about this role, please contact Qualcomm Careers.