Digital/RTL IC Design Engineer

Omni Design Technologies, Inc.; Bengaluru; On-site; INR 800,000 - 1,200,000; Full time

Job summary

Omni Design Technologies, Inc. is seeking a Digital Design Engineer in Bengaluru, India. The role focuses on high-performance analog-to-digital and digital-to-analog converters. Responsibilities include RTL design and verification, along with support for synthesis and timing closure.

The ideal candidate will have 2+ years' experience in mixed-signal IC development and strong Verilog coding skills. This position offers excellent compensation and promotes equal opportunity.

Qualifications

• 2+ years experience in high-performance digital or mixed-signal IC development.
• Strong foundation in digital design for complex ASICs.
• Ability to write testbenches and understand mixed-signal designs.

Responsibilities

• Design and verify RTL for high-performance data converters.
• Support synthesis, timing closure, and P&R flow.
• Work on digital backend for ADC and PLL.

Skills

Digital design concepts

Verilog RTL coding

Behavioral Verilog

Testbenches

Signal processing

Education

BS/BE/MS/MTech

Job description

Digital Design Engineer focusing on high-performance analog‑to‑digital and digital‑to‑analog converters. Responsibilities include RTL design, verification, behavioral modelling, and support of synthesis, timing closure, and P&R flow for the digital controller of high‑performance data converters in cutting‑edge technologies.

Qualifications

• BS/BE/MS/MTech + 2 years or equivalent experience in high‑performance digital or mixed‑signal IC development in advanced CMOS processes
• Strong foundation in digital design concepts for complex ASICs
• Hands‑on experience with Verilog RTL coding including state machines, adders, multipliers, combinatorial logic, etc.
• Strong understanding of digital design for mixed signal control loops and designing Verilog code to control analog circuits (e.g., digital backend for ADC, digital PLL, etc.)
• Familiarity with behavioral Verilog code, including wreals
• Ability to write thorough testbenches
• Basic understanding of SystemVerilog and assertions preferred
• Basic understanding of signal processing – MATLAB preferred but not mandatory
• Understanding of constraints, especially for mixed‑signal designs, including multiple clock domains and clock gating

We offer excellent compensation.

Omni Design is an equal opportunity employer.