Design Verification Engineer Lead

Texas Instruments; India; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

Texas Instruments India is seeking a Verification Engineer to drive DV ownership for IP, SS, and SoC, from specifications through post-silicon verification. You will contribute to verification methodologies and sign-off strategies across architecture, RTL, PD, DFT, systems, and firmware teams.

You will implement TBs, checkers, and coverage monitors, ensuring 100% traceability from specs to regressions while adhering to ISO26262 guidelines and robust DV workflows.

Qualifications

• Own DV for IP/subsystem/SoC from spec to post-silicon verification and issue resolution.
• Define verification strategy and plan with 100% spec-to-regression traceability.
• Perform DV coverage monitoring and DV flow updates per project needs.

Responsibilities

• Own DV for IP/subsystem/SoC from spec to post-silicon verification.
• Collaborate with Architecture, RTL, PD, DFT, Systems and FW teams to meet verification goals.
• Develop TBs and checkers; implement coverage monitors and sign-off metrics.
• Ensure DV sign-off based on regressions and coverage metrics in line with ISO26262.

Skills

DV ownership

Testbench development

UVM

Cross-functional collaboration

Tools

SV/UVM

RTL

Job description

The RADAR product line is a rapidly expanding business within TI, investing to address the fast-growing segment in Industrial & automotive markets. This product line will enable a scalable portfolio using DSP and ARM multi‑cores to support high‑end applications in ADAS, body & chassis and in industrial space. Radar systems process digital information from sources like digital cameras, lasers, radar and other sensors to perform tasks such as lane departure warning or parking assistance. The processed information can be displayed on screens or announced via acoustical warning signals. The system has multifaceted features such as high precision ADC, extremely accurate chirp, wide range visibility and faster scene processing abilities. As a Verification Engineer, you will play a pivotal role in ensuring the quality and reliability of our advanced RADAR products. You will be responsible for the verification of IP, subsystem (SS), and system‑on‑chip (SoC) designs, contributing to the development of robust verification methodologies and strategies.

Responsibilities

• Complete ownership of IP/subsystem/SoC DV ownership right from spec definition till the post‑silicon verification and solving the customer issues on need basis. This includes:
• Active involvement with architecture team during the spec definition phase
• Verification strategy definition along with verification plan to meet 100% spec to regression traceability along with sign‑off metrics
• IP/SS/SoC verification covering functional and firmware scenarios in RTL/PARTL, GLS/PAGLS modes.
• DV environment ownership: TB development/enhancements including checkers and coverage monitor definitions along with DV flow updates as per the project needs
• Active collaboration with cross‑functional teams – Architecture, RTL, PD, DFT, Systems, Analog, FW and application teams – to enable the verification goals for IP/subsystem/SoC starting from spec definition till post‑silicon verification closure activities
• Final SoC DV sign‑off based on regressions, coverage metrics, DV to spec traceability using C and/or SV‑UVM adhering to ISO26262 guidelines