Design Verification Engineer

Intel; Bengaluru; Hybrid; INR 1,200,000 - 1,800,000; Full time

Benefits offered by this job

Hybrid work model

Job summary

Intel in Bengaluru is seeking an experienced IP verification engineer to drive functional verification of IP logic and to develop verification plans, test benches, and environments that guarantee compliance with microarchitectural specifications.

You will execute verification plans, run system simulations, analyze power and timing, and identify bugs while collaborating with architects, RTL developers, and physical design teams to enhance verification of complex architectural features.

Qualifications

• Bachelor's Degree with 3-7 years of experience.
• Proficiency in Perl and Python programming languages.
• Excellent in SystemVerilog and computer architecture.
• Exposure to AMBA protocols preferred.

Responsibilities

• Performs functional verification of IP logic to ensure design meets specification requirements.
• Develops IP verification plans, test benches, and the verification environment to ensure coverage.
• Executes verification plans and runs system simulation models to verify design and uncover bugs.
• Replicates, root causes, and debugs issues in presilicon environment; collaborates with architects and RTL/physical design teams.
• Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
• Maintains and improves existing functional verification infrastructure and methodology.
• Participates in defining verification infrastructure and TFMs for functional design verification.

Skills

Perl

Python

SystemVerilog

AMBA protocols

Computer architecture

Network on Chip verification

VIP integration

Coherent Protocols CHI

Coherency architecture

Education

Bachelor's Degree

Job description

• Performs functional verification of IP logic to ensure design will meet specification requirements. Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications.
• Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
• Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.
• Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
• Maintains and improves existing functional verification infrastructure and methodology.
• Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.

Job Details

Job Description

• Performs functional verification of IP logic to ensure design will meet specification requirements. Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications.
• Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
• Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.
• Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
• Maintains and improves existing functional verification infrastructure and methodology.
• Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.

Qualifications

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

Bachelor's Degree with 3-7 years of experience.

• Very good perl, python (or) any programming language.
• Excellent in system Verilog
• Very good in computer architecture.
• Exposure to AMBA protocols preferred.

Preferred Qualifications

• Bringing up coherent protocols from 0 to1.
• 1 years of Experience on Network on Chip verification.
• 1 years of experience developing protocol checkers, bridge checkers, VIP integration,
• Configurable IP verification.
• Strong in coherency architecture and experience on Coherent Protocols CHI

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Job Type

Experienced Hire

Shift

Shift 1 (India)

Primary Location

India, Bangalore

Additional Locations

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION

Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.