CPU Physical Design Engineer

Intel; Bengaluru; Hybrid; INR 4,000,000 - 6,500,000; Full time

Job summary

Intel in Bengaluru seeks a CPU Physical Design Engineer to drive high-performance, low-power CPUs from RTL to GDSII. You will oversee synthesis, placement, routing, CTS, timing analysis, and power optimization, influencing next-generation Intel CPUs and manufacturing readiness.

You will join the Advanced Computing and Engineering (ACE) group, collaborating across teams to advance physical design methodologies and tool flows in a hybrid work model.

Qualifications

• Bachelor's degree or higher in a related engineering field with applicable experience.
• Experience with Synopsys and Cadence CTS, timing signoff, and low-power techniques.
• Knowledge of LVS/DRC and submicron process nodes.

Responsibilities

• Perform physical design from RTL to GDSII, including synthesis, placement, routing, CTS, and optimization.
• Conduct static timing and power distribution analyses to ensure manufacturability.
• Collaborate with multiple teams to improve CPU microarchitecture and design flows.
• Work with EDA vendors to enhance tools for high-speed, low-power CPU development.
• Optimize designs for power, frequency, and area; advance physical design methodologies.

Skills

Synthesis

Placement

Routing

Timing analysis

Low-power design

Power estimation

Verilog/VHDL familiarity

Education

Bachelor's degree in Electrical, Electronics, or Computer Engineering

Tools

Synopsys and Cadence tools

Job description

Job Details

Job Description:

The Role and Impact As a CPU Physical Design Engineer, you will play a pivotal role in implementing high-performance, low-power CPU designs from RTL to GDSII. You will focus on detailed processes such as synthesis, placement, routing, timing analysis, and power optimization, enabling designs that meet stringent performance and efficiency targets. Your work will directly influence the success of Intel's next-generation CPUs and their manufacturing readiness, contributing to innovative advancements in computing technology.

Business Group You will join the Advanced Computing and Engineering (ACE) group, a dynamic team dedicated to designing Intel's latest high-performance CPUs using cutting-edge technologies. This group focuses on delivering innovative solutions that propel Intel's leadership in the semiconductor industry. Collaborating across multiple domains, the team drives groundbreaking designs that support Intel's mission of creating world-changing technologies to enrich the lives of every person on Earth.

Key Responsibilities

• Perform physical design implementation from RTL to GDSII, including synthesis, placement, routing, clock tree synthesis, and optimization.
• Conduct static timing analysis, power distribution analysis, and reliability verification to ensure design convergence and high manufacturability.
• Collaborate with logic, circuit, architecture, and automation teams to improve CPU microarchitectures and design methodologies.
• Work closely with industry-leading EDA vendors to enhance tool capabilities for high-speed, low-power CPU development.
• Optimize designs for power, frequency, and area, ensuring product-level parameter excellence.
• Participate in developing and improving physical design methodologies and flow automation for future projects.

Qualifications

Minimum Qualifications

• Bachelor's degree in Electrical, Electronics, or Computer Engineering with 6+ years of physical design experience, or a Master's degree with 4+ years of relevant experience, or a PhD with 2+ years of experience.
• Technical expertise in synthesis, placement, clock tree synthesis (CTS), and routing tools, particularly using Synopsys and Cadence platforms.
• Proficiency in timing signoff, formal verification, and low-power design techniques.
• Solid understanding of submicron process node technologies and layout verification methods such as LVS/DRC.
• Skilled in power estimation, power optimization, and power delivery methodologies.

Preferred Qualifications

• Familiarity with scripting languages like Tcl, Perl, and Python for automating physical design workflows.
• Experience with Verilog or VHDL for hardware description and design execution.
• Strong communication skills, both verbal and written, for collaborative problem-solving.
• Demonstrated ability to work effectively in dynamic environments across geographies.
• Knowledge of innovative feature feasibility studies and SD flow methodologies.

Be part of a world-class team driving innovation in CPU design.

Job Type

Experienced Hire

Shift

Shift 1 (India)

Primary Location:

India, Bangalore

Additional Locations:

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.