CPU Design Verification Engineer

844 Altera Semiconductor Technology India Pvt. Ltd.; Bengaluru; On-site; INR 1,500,000 - 2,000,000; Full time

Job summary

844 Altera Semiconductor Technology India Pvt. Ltd. seeks a CPU Design Verification Engineer in Bengaluru, Karnataka. This role involves validating the functional correctness of Altera's RISC-V processors by working closely with CPU architects and design teams.

The ideal candidate will have extensive experience in ASIC or FPGA verification, strong HDL skills, and proficiency in modern verification methodologies. Join a vibrant team and tackle complex technical challenges that define the future of computing.

Qualifications

• 8+ years of experience in ASIC or FPGA design verification.
• Expertise in HDLs like Verilog/VHDL and HVLs like System Verilog.
• Experience with RISC-V instruction set architecture.

Responsibilities

• Develop and execute verification plans for CPU logic.
• Create scalable UVM-based verification environments.
• Perform functional coverage analysis and implement closure plans.

Skills

Verification plans development

UVM-based testbenches

Debugging and root-cause analysis

Scripting in Python, Perl, C++

Communication and collaboration skills

Education

Bachelor's or Master's in Electronics/Computer Engineering

Tools

Synopsys VCS

Cadence Xcelium

Mentor Questa

Job description

Job Overview

As a CPU Design Verification Engineer, you will play a pivotal role in ensuring the functional correctness and performance of Altera's RISC-V processor family. Working alongside world-class CPU architects, RTL designers, and system design teams, you will help validate designs that meet rigorous functional and performance goals. This is your opportunity to tackle complex technical challenges while contributing to products that shape the computing landscape.

Key Responsibilities

• Develop and execute sophisticated verification plans to validate CPU logic against architectural and microarchitectural specifications.
• Create scalable, reusable verification environments using UVM-based testbenches and advanced functional coverage models.
• Perform in-depth functional coverage analysis, identify critical verification gaps, and implement strategic closure plans.
• Execute complex system‑level simulations to validate functionality.
• Debug and perform root‑cause analysis of issues in pre‑silicon environments, implementing robust corrective measures.
• Develop automation scripts and tools using Python, Perl, C++, or similar languages to optimize verification workflows.
• Partner closely with CPU architects and RTL developers to verify complex architectural features.
• Maintain and enhance verification infrastructure, methodologies, and automation flows to maximize team productivity.
• Document comprehensive verification strategies and lead technical reviews with cross‑functional stakeholders.
• Contribute to CPU architecture and microarchitecture feature definition to achieve optimal functional and performance targets.

Qualifications

• Bachelor's or Master's degree in Electronics Engineering or Computer Engineering.
• 8+ years of experience in ASIC or FPGA design verification.
• Expertise in HDLs such as Verilog or VHDL and HVLs such as System Verilog.
• Strong hands‑on experience developing UVM‑based testbenches and verification components.
• Experience with the RISC‑V instruction set architecture.
• Proficiency in modern verification methodologies, including coverage‑driven verification (CDV) and assertion‑based verification (ABV).
• Familiarity with industry‑standard protocols such as AMBA (AXI, ACE, CHI, APB).
• Experience with simulation and debug tools (e.g., Synopsys VCS, Cadence Xcelium, Mentor Questa).
• Strong scripting skills in Python, Perl, or Tcl for automation and data analysis.
• Excellent analytical, problem‑solving, and debugging skills.
• Strong communication skills and ability to work effectively in a collaborative, cross‑functional team environment.

Job Type and Details

Regular.

Shift: Shift1 (India).

Primary Location: Bengaluru, Karnataka, India. Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.