Engineer / Staff / Sr. Staff Engineer - CPU Verification (RAS)

SiFive India Private Limited; Hyderabad; On-site; INR 800,000 - 1,200,000; Full time

Job summary

SiFive India Private Limited is seeking talented engineers for hardware verification roles in Hyderabad. The position requires at least 1 year of experience in hardware verification and a relevant degree. You will be responsible for developing testbenches and collaborating with RTL designers to resolve issues.

This role values diversity and provides a chance to work in an inclusive environment. Applicants should have a strong knowledge of advanced computer architecture, System Verilog, and UVM.

Qualifications

• 1+ years of experience in hardware verification.
• Strong foundational grasp of advanced computer architecture.
• Deep understanding of hardware verification concepts.

Responsibilities

• Develop, maintain, and enhance testbenches using System Verilog and UVM.
• Extract verification requirements and participate in test plan reviews.
• Collaborate with RTL designers to resolve complex issues.

Skills

System Verilog

UVM

Scripting languages (Python, Perl, Bash)

Education

Bachelor’s or Master’s degree in Electrical Engineering or related field

Job description

Job Description

About the Role

We are looking for talented engineers across multiple experience levels to ensure the highest quality of our CPU IP. Whether you are an emerging engineer looking to grow your skills or an industry veteran ready to architect complex verification environments, you will play a crucial role in our ASIC design cycle. The exact scope of your responsibilities, technical ownership, and leveling will be tailored to your experience and demonstrated capabilities.

Key Responsibilities

• Develop, maintain, and enhance block-level and sub-system testbenches using System Verilog and UVM.
• Extract verification requirements from architecture specifications and participate in test plan reviews.
• Write directed and constrained-random tests to achieve high functional and code coverage metrics.
• Debug simulation failures and collaborate closely with RTL designers to resolve complex issues.
• Maintain and optimize automated regression setups.

Mandatory Requirements

• 1+ years of experience with a Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
• Strong foundational grasp of advanced computer architecture (pipelines, memory hierarchies, caches).
• Knowledge in System Verilog (SV) and the Universal Verification Methodology (UVM).
• Deep understanding of hardware verification concepts, including constrained-random stimulus generation and coverage-driven verification.
• Familiarity with scripting languages (e.g., Python, Perl, Bash) to automate workflows.

Preferred Qualifications

• Working knowledge of Reliability, Availability, and Serviceability (RAS) architecture.
• Proven experience or familiarity with RAS verification techniques, including error correction code (ECC) testing, parity generation/checking, data poisoning, and hardware fault injection.
• Comprehensive knowledge of the RISC-V Instruction Set Architecture (ISA) and custom extensions.

Additional Information

This position requires a successful background and reference checks and satisfactory proof of your right to work in India. Any offer of employment for this position is also contingent on the Company verifying that you are an authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.

SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.