ASIC Manager

Weekday 1; Hyderabad; On-site; INR 1,500,000 - 6,000,000; Full time

Job summary

Weekday 1 is seeking an experienced Senior Verification Lead to head the verification of high‑speed IPs and subsystems, with a strong focus on PCIe, SystemVerilog, and UVM. You will define verification strategies, drive end‑to‑end verification from specification through silicon bring‑up, and mentor a team of 10+ engineers.

The role requires collaboration across geographies to deliver scalable methodologies and high‑quality verification programs, including post‑silicon support.

Qualifications

• 14+ years of overall verification experience.
• 12+ years hands-on IP/subsystem verification with SystemVerilog and UVM.
• Expert knowledge of PCIe protocols (Root Complex, Endpoint, SR-IOV).
• Experience leading teams of 10+ engineers and technical leads.
• Hands-on silicon bring-up and post-silicon debugging.

Responsibilities

• Lead verification of high-speed IPs and subsystems, including PCIe-based designs, using SystemVerilog and UVM.
• Define verification strategies, methodologies, plans, schedules, milestones, and deliverables for IP and subsystem programs.
• Drive end-to-end verification execution from specification analysis through product qualification and silicon bring-up.
• Establish scalable, reusable, portable, and efficient verification environments and methodologies.
• Develop automation to improve verification productivity, coverage, quality, and execution.
• Collaborate with Architecture and Design to align verification flows and deliverables.
• Review architecture and design specs and translate requirements into verification strategies.
• Lead verification closure, including coverage analysis, regression management, defect tracking, and quality assessment.
• Drive PCIe Root Complex, Endpoint, and SR-IOV functionality verification.
• Support verification involving PCIe/NVMe, NAND, and AXI; assist silicon bring-up activities.

Skills

Senior verification lead

SystemVerilog

UVM

PCIe

SoC verification

Automation

Team leadership

silicon bring-up

Education

Bachelor's or Master's in Electrical/Electronics/Computer Engineering

Tools

SystemVerilog tools

Job description

This role is for one of the Weekly's clients

Salary range: Rs 1000000 - Rs 6000000 (ie INR 1-60 LPA)

Experience: 9+ yrs

Location: Hyderabad, Telangana, India

Job Type: Full-time

We are looking for an experiencedSenior Verification Leadto lead the verification of high-speed IPs and subsystems, with a strong focus onPCIe, SystemVerilog, UVM, and SoC verification methodologies.

The role combines deep technical expertise, verification strategy, team leadership, automation, and cross-functional collaboration. You will be responsible for driving high-quality IP and subsystem verification, establishing scalable methodologies, supporting silicon bring-up, and enabling multiple verification programs to execute efficiently and reliably.

Requirements

Key Responsibilities

• Lead verification ofhigh-speed IPs and subsystems, including PCIe-based designs, using SystemVerilog and UVM.
• Define verification strategies, methodologies, plans, schedules, milestones, and deliverables for IP and subsystem programs.
• Drive end-to-end verification execution from specification analysis throughproduct qualification and silicon bring-up.
• Establish scalable, reusable, portable, and efficient verification environments and methodologies.
• Develop and implement automation solutions to improve verification productivity, coverage, quality, and execution efficiency.
• Collaborate closely with Architecture and Design teams to understand requirements and align verification flows and deliverables.
• Review architecture and design specifications and translate requirements into comprehensive verification strategies.
• Lead verification closure, including coverage analysis, regression management, defect tracking, and quality assessment.
• Drive verification ofPCIe Root Complex, Endpoint, and SR-IOVfunctionality.
• Support verification involving industry-standard interfaces and architectures such asPCIe/NVMe, NAND, and AXI.
• Lead and supportsilicon bring-upactivities and collaborate with hardware and engineering teams to resolve silicon-level issues.
• Plan team capacity and ramp-up to support verification of multiple IPs and subsystems in parallel.
• Manage technical execution across challenging schedules while maintaining verification quality and delivery commitments.
• Establish best practices for verification automation, portability, reusability, and continuous improvement.
• Collaborate with engineering teams across multiple geographies to coordinate execution and resolve dependencies.
• Provide technical mentoring, coaching, and career development support to verification engineers and technical leads.
• Identify verification risks, execution bottlenecks, and methodology gaps and drive appropriate corrective actions.
• Contribute to continuous improvement of verification processes, tools, frameworks, and engineering practices.

What Makes You a Great Fit

• 14+ years of overall verification experience, with strong expertise in semiconductor IP, subsystem, and SoC verification.
• 12+ years of hands-on experiencein IP/subsystem verification usingSystemVerilog and UVM.
• Expert-level knowledge ofPCIe protocols, including Root Complex, Endpoint, and SR-IOV functionality.
• Strong understanding ofSoC verification methodologies, processor architectures, and storage controller architectures.
• Experience with industry-standard interfaces such asPCIe/NVMe, NAND, and AXIis highly desirable.
• Proven experience leading and managing teams of10+ engineers and technical leads.
• Strong experience defining verification strategies, methodologies, environments, coverage plans, and execution frameworks.
• Demonstrated ability to driveautomation, portability, reusability, and verification efficiency.
• Experience leading complex verification programs through challenging schedules and multiple parallel deliverables.
• Hands-on experience withsilicon bring-up and post-silicon debugging.
• Strong collaboration skills with Architecture, Design, Validation, Firmware, and other engineering teams across multiple geographies.
• Excellent technical leadership, mentoring, coaching, and people-management capabilities.
• Strong analytical and problem-solving skills with the ability to identify risks and drive issues to closure.
• Bachelor's or Master's degree inElectrical Engineering, Electronics Engineering, Computer Engineering, or a related discipline.