ASIC front-end Design Engineer

Jobtailor; Bengaluru; On-site; INR 800,000 - 1,400,000; Full time

Benefits offered by this job

Health and wellness benefits

Personal and professional development programs

Flexible work environment

Job summary

Hewlett Packard Enterprise Development LP is seeking an ASIC Front-End Design Engineer based in Bengaluru. This onsite role involves defining high-performance networking ASICs and collaborating with various technical teams.

The ideal candidate should possess strong Verilog RTL coding skills, a solid understanding of networking protocols, and a relevant degree (MSEE or BSEE). The company offers health and wellness benefits and opportunities for personal development.

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Qualifications

• Strong Verilog RTL coding skills.
• Excellent problem-solving and ASIC debugging skills.
• Good knowledge of high-speed serial interfaces.

Responsibilities

• Define and architect high-performance blocks for advanced networking ASICs.
• Perform micro-architecture and logic design.
• Collaborate with the verification team in developing test plans.

Skills

Verilog RTL coding

ASIC debugging skills

Knowledge of Synopsys Design Compiler

Networking protocols (Ethernet, FCoE)

High-performance memory subsystems

Education

MSEE or BSEE

Tools

Verilog LEC (Verplex)

Spyglass

Job description

ASIC Front‑End Design Engineer

Location: Kolkata. This onsite role is primarily based in the HPE office.

Responsibilities

• Define and architect high‑performance blocks for advanced networking ASICs.
• Perform micro‑architecture and logic design to deliver maximum throughput while minimizing power consumption.
• Collaborate with the verification team in developing test plans and debugging test failures.
• Work with the physical design team to develop timing constraints, analyze violations, and perform timing fixes.

Qualifications

• Strong Verilog RTL coding skills.
• Knowledge of Synopsys Design Compiler, Verilog LEC (Verplex), and Spyglass.
• Experience designing ASICs for networking protocols (Ethernet, FCoE).
• Knowledge of high‑performance memory subsystems, multi‑domain clock synchronization, and high‑speed serial interfaces.
• Excellent problem‑solving and ASIC debugging skills.
• Excellent written and verbal communication skills.
• MSEE or BSEE required.

Benefits

• Health and wellness benefits supporting physical, financial, and emotional wellbeing.
• Opportunities for personal and professional development through targeted programs.
• Unconditional inclusion and a flexible work environment.

Equal Opportunity Statement

Hewlett Packard Enterprise is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions are made on the basis of qualifications, merit, and business need.