Sensors Front-End ASIC Design Engineer (Low-Power)

European Tech Recruit; Munster; On-site; EUR 70,000 - 100,000; Full time

Job summary

European Tech Recruit is seeking a Sensors Design Engineer in Ireland to define, model, and verify digital sensor IP and subsystem integrations for next-generation mobile, automotive, IoT platforms. You will work across the full front-end ASIC lifecycle, from micro-architecture definition to delivering timing-closed netlists ready for layout.

You will conduct RTL coding in SystemVerilog/Verilog, perform power estimations, and collaborate with cross-functional teams to drive frontend workflows

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical field.
• 1+ years of hands-on experience in digital RTL design on complex ASICs or SoCs.
• Strong proficiency in SystemVerilog, Verilog, and scripting (Python, Tcl, or Perl).
• Hands-on experience with core ASIC front-end tools (Synthesis, PrimeTime, RTL Linting, LEC, Gate-Level Simulations).

Responsibilities

• Architect, design, and implement digital sensor hardware and subsystems for integration into high-performance, low-power SoCs.
• Conduct RTL coding (SystemVerilog/Verilog), verification, bit-exact vector matching, and debugging.
• Drive front-end implementation flows: ASIC synthesis, Static Timing Analysis (STA), Formality/LEC, and Clock Domain Crossing checks.
• Implement low-power design methodologies and perform power estimations using PTPX and related tools.
• Utilize Python, Tcl, or Perl to automate methodologies and improve engineering team workflows.
• Collaborate closely with cross-functional Systems, Software, and SoC architecture teams throughout all project phases.

Skills

SystemVerilog

Verilog

Python scripting

Tcl scripting

Perl scripting

RTL design experience

C++/SystemC modeling

Education

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical field

Tools

Synthesis

PrimeTime

RTL Linting

LEC

Gate-Level Simulations

Job description

European Tech Recruit is seeking a Sensors Design Engineer in Ireland to define, model, and verify digital sensor IP and subsystem integrations for next-generation mobile, automotive, IoT platforms. You will work across the full front-end ASIC lifecycle, from micro-architecture definition to delivering timing-closed netlists ready for layout.

You will conduct RTL coding in SystemVerilog/Verilog, perform power estimations, and collaborate with cross-functional teams to drive frontend workflows