Senior Staff IT Engineer

European Tech Recruit; Cork; On-site; EUR 90,000 - 130,000; Full time

Job summary

European Tech Recruit seeks an experienced ASIC Digital Design Engineer for Cork, Ireland. You will architect and implement digital blocks for mixed-signal IPs, optimize PPA via DSP techniques, and drive verification and physical implementation with DV and PD teams.

You will run lint, CDC, DFT, synthesis, STA tools, collaborate on test plans, and produce clear specifications and documentation. Excellent communication and teamwork are essential.

Qualifications

• Master's degree in electrical engineering, computer engineering, or a related field.

Responsibilities

• Architect, design, and implement digital sections of mixed-signal IPs (SerDes, DDR, PLL, DAC, ADC, sensors, etc.)
• Apply computer architecture, DSP, and optimization techniques to improve IP PPA
• Run full ASIC design tool suite (lint, CDC, DFT, synthesis, FV, STA) to validate and implement the design
• Collaborate with DV team to define test plans, verify the design, and fix bugs
• Collaborate with PD team for physical implementation of the design
• Create design specifications and documentation
• Work with testing team for silicon bring-up and debug

Skills

Communication skills

Team collaboration

Problem solving

Attention to detail

Education

Master's degree in electrical engineering, computer engineering, or related field

Tools

Design Compiler

Fusion Compiler

Modelsim

VCS

Spyglass

PrimeTime

Job description

This role requires prior work experience in ASIC digital design flow, including micro-architecture definition, RTL coding, front-end implementation, as well as collaboration with DV and PD teams for verification and physical implementation of the design.

Responsibilities:

• Architecture, design, and implementation of digital sections of mixed-signal IPs (SerDes, DDR, PLL, DAC, ADC, Sensors, etc.)
• Apply computer architecture, digital signal processing (DSP), and optimization techniques for improving power, performance, and area (PPA) of IPs
• Run full suite of ASIC design tools (lint checking, CDC, DFT, synthesis, FV, STA, etc.) to validate and implement the design
• Work with design verification (DV) team to define test plans, verify the design, and fix bugs
• Work with physical design (PD) team for physical implementation of the design
• Create design specifications and documentations
• Work with testing team for silicon bring-up and debug

Minimum Qualifications

• Master's degree in electrical engineering, Computer Engineering, or related field.
• 5+ years of experience in ASIC digital design, including micro-architecture and RTL design
• Experience working with various front-end ASIC tools such as Design Compiler, Fusion Compiler, Modelsim, VCS, Spyglass, and primetime.
• Excellent communication skills and ability to contribute strongly within a high-performance team

Highly Preferred Qualifications

• Experience in computer architecture, digital signal processing, and algorithm design
• Experience in scripting languages (Python, Perl)
• Experience with at least one mixed-signal IP, such as SerDes (USB, PCIe, MIPI, UFS), DDR PHY, Timing circuitries (PLL, DLL, FLL), Data Convertors (DAC, ADC), or sensors

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