ASIC Digital Design Engineer (CPU/GPU Teams) - Visas Supported

European Tech Recruit; Cork; On-site; EUR 70,000 - 120,000; Full time

Job summary

European Tech Recruit is seeking an experienced ASIC Hardware Design Engineer to join a Global Leading Semiconductor company in Cork, Ireland. The role focuses on micro-architecture and RTL design for GPU blocks, optimization for performance and power, and verification across the project lifecycle.

Responsibilities include RTL development, verification, and collaboration with cross-functional teams. Experience with graphics APIs and extensive RTL design for GPU/ASIC is highly valued.

Qualifications

• 3–20 years of experience required.
• Verilog/SystemVerilog design experience.
• Synopsys synthesis experience.
• Low power design experience.
• Test plan development and coverage-based verification.
• Experience with C/C++/Python is desirable.
• RTL design for GPU/CPU/DSP/ML/ cache/controllers/video/display/camera in ASIC is desired.
• Exposure to graphics APIs (OpenGL, Vulkan, Direct3D) is a plus.
• Strong communication and teamwork skills.

Responsibilities

• Micro-architecture and RTL design for GPU blocks and modules across shader processing, graphics pipelines, memory subsystem, interconnect, power and system level design.
• Identify optimizations to hardware design for performance, power and cost.
• Evaluate hardware feasibility of complex algorithms and requirements.
• Develop micro-architecture and specifications for new-generation designs.
• Develop RTL for the corresponding micro-architecture.
• Provide verification and debugging throughout the project lifecycle.
• Optimize silicon cost and clock speed.
• Troubleshoot silicon issues related to the design.

Job description

ASIC Hardware Design Engineer

A great opportunity for an experienced ASIC Design Engineer to join a Global Leading Semiconductor company, working alongside their GPU Team in Cork, Ireland.

The Role

• Micro-architect and design RTL for blocks and modules of our GPU architecture across shader processing, graphics pipelines, memory subsystem and interconnect, and power and system level design
• Identify advanced ways to optimize hardware design for better performance, power, and cost
• Evaluate the hardware feasibilities of complex algorithms and requirements
• Develop micro architecture and specification of the new generation design
• Develop RTL for the corresponding micro architecture
• Provide essential verification and debugging activities for the corresponding design throughout the entire project cycles
• Optimize the silicon cost and improve clock speed
• Troubleshoot silicon issues with products relevant to the corresponding design

Requirements

• The team looks for wide range of level and experience, typically from 3 years to 20 years.
• Experience with Verilog/SystemVerilog design, Synopsys synthesis, low power design, test plan development, coverage-based design verification
• Experience with Computer Architecture, Computer Arithmetic, Low power design, C/C++/Python programming languages is desired.
• Experience in designing RTL for GPU, CPU, DSP, Machine-Learning, cache, controller, video, display, camera blocks in ASIC is desired.
• Exposure to Graphics API (OpenGL, Vulkan, Direct3D, etc) is big plus
• Good communication skill and desire to work as a team player

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