Senior Mixed-Signal SoC Physical Design Engineer

Analog Devices; Limerick; On-site; EUR 90,000 - 120,000; Full time

Job summary

Analog Devices in Limerick, Ireland, seeks a Senior Physical Design Engineer for its Data Center & Energy group. You will own physical implementation of complex mixed-signal SoCs from RTL handoff to GDSII signoff, spanning multiple process nodes and collaborating across RTL, analog layout, and verification teams.

Work in a fast-paced, agile environment to meet aggressive performance, power, and area targets.

Qualifications

• BS in Electrical or Computer Engineering (or equivalent).
• 4+ years of experience in ASIC/SoC physical design and implementation.
• Strong proficiency with Cadence digital implementation tools (Genus, Innovus, Tempus, Conformal, Voltus, Pegasus).
• Solid understanding of static timing analysis, clock domain crossing, and multi-corner multi-mode signoff.
• Experience with mature analog process nodes (e.g., 180nm BCD) in addition to advanced digital nodes.
• Experience with power analysis (IR-drop, EM) and power intent specification (UPF/CPF).
• Working knowledge of DFT methodologies (scan insertion, compression, ATPG, JTAG/boundary scan).
• Proficiency in scripting for automation and flow development (Tcl, Python, shell).

Responsibilities

• Drive physical implementation from RTL handoff through GDSII signoff, including floorplanning, power planning, placement, clock tree synthesis, routing, and timing closure.
• Perform and close static timing analysis across PVT corners; resolve timing violations with design and layout teams.
• Develop and maintain robust power delivery networks; perform IR-drop and electromigration analysis and drive fixes to closure.
• Execute physical verification (DRC, LVS, antenna, ERC) and resolve issues to achieve clean signoff.
• Collaborate with analog layout engineers on mixed-signal integration and constraint development for sensitive analog/digital boundaries.
• Support design-for-test (DFT) insertion, scan chain stitching, and ATPG pattern generation.
• Contribute to flow development, methodology improvements, and automation of physical design tasks.
• Support silicon bring-up and debug; correlate physical design decisions with lab measurements.

Skills

ASIC/SoC PD

Scripting (Tcl/Python)

Problem-solving

Independent work

Communication

Education

BS in Electrical or Computer Engineering

Tools

Genus

Innovus

Tempus

Conformal

Voltus

Pegasus

Job description

Analog Devices in Limerick, Ireland, seeks a Senior Physical Design Engineer for its Data Center & Energy group. You will own physical implementation of complex mixed-signal SoCs from RTL handoff to GDSII signoff, spanning multiple process nodes and collaborating across RTL, analog layout, and verification teams.

Work in a fast-paced, agile environment to meet aggressive performance, power, and area targets.