Hardware Verification Engineer: AI/DSP Processor Systems

QUALCOMM, Inc.; Cork; On-site; EUR 55,000 - 85,000; Full time

Benefits offered by this job

Salary and bonus

Maternity/Paternity Leave

Employee stock purchase

Matching pension

Education Assistance

Relocation support

Life, Medical, Travel Insurance

Well-being subsidies

Bike purchase scheme

Employee clubs

Job summary

QT Technologies Ireland Limited, part of Qualcomm's Hexagon DSP AI team, seeks a Hardware Verification Engineer to verify complex hardware designs and ensure high-quality silicon. You will collaborate with design and architecture teams and contribute to testbench development and verification methodology.

Ideal candidates have 0–3 years of related experience, proficiency in SystemVerilog/UVM, and a solid foundation in digital design concepts, RTL, and scripting.

Qualifications

• Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering or related discipline.
• 0–3 years of hardware design, verification, or digital design experience.
• Academic or internship experience with digital design concepts and RTL development.

Responsibilities

• Verify processor, DSP, AI accelerator and system-level hardware designs.
• Develop and maintain testbench components using SystemVerilog and UVM.
• Create and execute verification test cases to validate hardware functionality.
• Develop constrained-random, directed, and coverage-driven verification environments.

Skills

SystemVerilog

UVM

Verilog

VHDL

Python

C/C++

Debugging tools

Linux

Education

Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering

Tools

SystemVerilog

UVM

RTL development

Linux

Job description

QT Technologies Ireland Limited, part of Qualcomm's Hexagon DSP AI team, seeks a Hardware Verification Engineer to verify complex hardware designs and ensure high-quality silicon. You will collaborate with design and architecture teams and contribute to testbench development and verification methodology.

Ideal candidates have 0–3 years of related experience, proficiency in SystemVerilog/UVM, and a solid foundation in digital design concepts, RTL, and scripting.