Front-End Implementation Engineer (Staff) (Timing & Synthesis)- Cork, Ireland

QUALCOMM, Inc.; Ireland; On-site; EUR 90,000 - 130,000; Full time

Benefits offered by this job

Stock bonus

Leave benefits

Employee stock purchase

Pension matching

Education assistance

Relocation support

Insurance

Well-being memberships

Bike scheme

Employee clubs

Job summary

QT Technologies Ireland Limited in Cork, Ireland is seeking a Front-End Implementation Engineer to create top-level timing constraints, perform physical synthesis, and handle formal verification and ECOs to bridge RTL and physical design.

You will join an established implementation team working on Snapdragon SoCs in 4nm and below technology, with 5–10 years of ASIC experience in related areas.

Qualifications

• Bachelor's or Master's in Electronics or Computer Engineering with 5+ years ASIC experience.
• Experience in logical/physical synthesis and timing closure (STA).
• Proficient in Verilog RTL design and TCL scripting for CAD flows.
• Knowledge of UPF, low-power checks and formal verification.
• Experience with TCL/PERL/Python scripting for CAD design flows.

Skills

Verilog RTL

Timing closure

TCL scripting

Perl/Python scripting

Physical synthesis

DFT implementation

UPF/Low power

Formal verification

STA timing analysis

Synthesis flows

Education

Bachelor's degree in Science, Engineering, or related field

Master's degree in Science, Engineering, or related field

PhD in Science, Engineering, or related field

Tools

Synopsys tools

Job description

Company:

QT Technologies Ireland Limited

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

About the Role

QCTs Digital ASIC Team is actively seeking Front-End Implementation Engineer to work on the creation of top-level timing constraints, physical synthesis, formal verification and functional ECOs to bridge the RTL and physical design worlds at our Cork, Ireland location. You will be part of an established Implementation team that will drive and execute on all phases of the design flow for Snapdragon SoCs at the core and chip-level in 4nm and below technology.

What are we looking for?

• Bachelors/Masters in Electronics or Computer Engineering and 5 to 10 years’ experience across the following areas:
• Logical/Physical synthesis, DFT implementation, timing closure in STA
• Timing constraint capture in TCL for Synopsys tools
• Formal verification, Functional/Timing ECO Implementation
• Verilog RTL design
• UPF, Low power checks

This Position Requires Detailed Knowledge Of

• Masters in Electronics or Computer Engineering plus a minimum 5 years of experience
• Timing constraint development for large complex SoC devices
• TCL script development
• TCL/PERL/Python script development for CAD design flows
• Physical synthesis
• Formal verification, UPF, Low power checks, Static Timing Analysis
• Good understanding of Design for test concepts

Where you will be working

Cork has a proud reputation as Ireland's second largest economic engine and is now one of the Top 20 location choices in Europe with 39,000 people being employed by over 170 overseas companies. There's a growing diversity in the region with people from many nationalities relocating to Cork, relishing the opportunity to work and live in a location that offers an excellent quality of life. A gateway to Europe, Cork airport provides access to almost 50 international destinations including transatlantic air routes.

Equal Opportunities

We are an Equal Opportunity employer; all qualified applicants will receive consideration for employment without regard to race, colour, religion, sexual orientation, gender identity, national origin, disability, veteran status, or any protected classification.

What's on Offer

• Salary, stock and performance related bonus
• Maternity/Paternity Leave
• Employee stock purchase scheme
• Matching pension scheme
• Education Assistance
• Relocation and immigration support (if needed)
• Life, Medical, Income and Travel Insurance
• Subsidised memberships for physical and mental well-being
• Bicycle purchase scheme
• Employee run clubs, including, running, football, chess, badminton + many more

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
• References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

Qualcomm is an equal opportunity employer.

If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).