Senior ASIC Design Engineer: Microarchitecture & RTL

eTeam

Cork

On-site

EUR 90,000 - 130,000

Full time

14 days+

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Job summary

eTeam in Cork, Ireland, is seeking a Design Engineer to join the Microcontroller Sub-System IP team and shape cutting-edge digital designs. You will contribute to micro-architecture, RTL development, debugging, and cross-functional collaboration across DFT, Implementation, Verification, Emulation, and Firmware teams.

The role requires 5+ years in ASIC design, familiarity with ARM THUMB or RISC‑V ISAs, and experience with multi-clock and multi-power domains.

Qualifications

  • Bachelor's degree in Science, Engineering, or a related field.
  • 5+ years of ASIC design experience.
  • Experience with ISAs such as ARM THUMB or RISC‑V.
  • Experience with multi-clock and multi-power designs.

Responsibilities

  • Micro-Architecture: design micro-architecture for digital blocks.
  • RTL Development: develop RTL code with multi-clock, high-frequency, low-power considerations.
  • Debugging and Post-Silicon Bring‑Up: troubleshoot and support bring‑up activities.
  • Documentation: create design documentation for clarity and maintainability.
  • Design Optimization: optimize for area, power, and performance.
  • Collaborate with DFT, Implementation, Verification, Emulation, and Firmware teams.

Skills

ASIC design
RTL development
Micro-architecture
Multi-clock domain
Multi-power domain
Python/Perl scripting
DFT/Verification basics
ISAs ARM/RISC‑V
Processor/microcontroller design
Documentation

Education

Bachelor's degree

Tools

RTL tools
EDA tools

Job description

eTeam in Cork, Ireland, is seeking a Design Engineer to join the Microcontroller Sub-System IP team and shape cutting-edge digital designs. You will contribute to micro-architecture, RTL development, debugging, and cross-functional collaboration across DFT, Implementation, Verification, Emulation, and Firmware teams.

The role requires 5+ years in ASIC design, familiarity with ARM THUMB or RISC‑V ISAs, and experience with multi-clock and multi-power domains.

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