Staff RTL/Digital Design Engineer - (CPU Team) - Visas Transfers Supported

European Tech Recruit; Cambridge; On-site; GBP 90,000 - 120,000; Full time

Job summary

A fantastic opportunity for an experienced RTL Design Engineer to join a global leader in semiconductors, working alongside their CPU Team in Cambridge (UK).

You will contribute to CPU RTL development, micro-architecture definition, and RTL ownership, collaborating with chip architects and verification teams to meet performance and power targets.

Qualifications

• Experience in CPU RTL development and microarchitecture.
• Proficiency in Verilog or VHDL and hardware verification basics.
• Strong understanding of power, performance, and area trade-offs.

Responsibilities

• Performance exploration with CPU modelling team.
• Microarchitecture development and specification planning.
• RTL ownership: develop, assess and refine RTL to meet targets.
• Functional verification support for verification strategy.
• Performance verification to ensure RTL meets goals.
• Design delivery with cross-functional teams focusing on timing, area, reliability and power.

Skills

Microarchitecture

RTL Design

Verilog/VHDL

Perl/Python scripting

CPU performance optimization

Tools

Verilog

VHDL

Simulators

Waveform debugging tools

Job description

A fantastic opportunity for an experienced RTL Design Engineer to join a global leader in semiconductors, working alongside their CPU Team in Cambridge (UK).

About the Role

Working on CPU RTL development targeted for high performance, low power devices, as a CPU Micro-architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture, and also help with architecture/product definition through early involvement in the product life-cycle.

What will you be doing?

• Performance exploration. Explore high performance strategies working with the CPU modelling team.
• Microarchitecture development and specification. From early high-level architectural exploration, through micro architectural research and arriving at a detailed specification.
• RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals.
• Functional verification support. Help the design verification team execute on the functional verification strategy.
• Performance verification support. Help verify that the RTL design meets the performance goals.
• Design delivery. Work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and power.

What are we looking for?

• Thorough knowledge of microprocessor architecture including expertise in one or more of the following areas: instruction fetch and decode, branch prediction, instruction scheduling and register renaming, out-of-order execution, integer and floating point execution, load/store execution, prefetching, cache and memory subsystems
• Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools
• Knowledge of logic design principles along with timing and power implications
• Understanding of low power microarchitecture techniques
• Understanding of high performance techniques and trade-offs in a CPU microarchitecture
• Experience using a scripting language such as Perl or Python

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