Senior Verification Engineer - Hybrid CPU Validation Pro

ARM; Cambridge; Hybrid; GBP 45,000 - 80,000; Full time

Benefits offered by this job

Hybrid working model

Job summary

Arm in Cambridge is seeking a Senior Engineer to join the CPU verification team, owning verification across unit tests to full verification strategy. The role emphasizes collaboration with design and verification teams and applying advanced simulation-based methods.

The position offers a hybrid working model with no relocation package, and requires experience with SystemVerilog, UVM, and C/C++. Strong communication skills are essential to explain complex concepts to varied audiences.

Qualifications

• Experience building verification environments for RTL designs.
• Strong proficiency in SystemVerilog and scripting languages (Python, Perl, Tcl).
• Proven grasp of the verification process from test planning to verification closure.
• Ability to translate complex specs into verification scenarios.
• Strong understanding of computer architecture fundamentals (pipelining, memory systems).
• Excellent communication and presentation skills for diverse audiences.
• Solid knowledge of Arm architecture.
• Experience with verification methodologies such as UVM.
• Programming experience in C/C++ and Python.
• Experience verifying microprocessor or CPU designs.
• Understanding of constrained-random stimulus, coverage, and checking methodologies.
• Experience conducting detailed technical reviews of verification or design work.
• Interest in applying AI tools to engineering productivity.

Responsibilities

• Take ownership of verification in a CPU area, from unit-level testbench to full verification approach.
• Deliver functional verification to quality standards and project schedules.
• Develop test plans, verification strategies, and coverage goals.
• Collaborate with project leads on planning, scheduling, and quality checkpoints.
• Use data-driven analysis to assess verification progress and product quality.
• Contribute to verification methodology and productivity improvements across CPU verification teams.
• Investigate, debug, and drive root-cause analysis of verification issues.
• Build and refine simulation-based verification environments for future CPU IP.
• Collaborate with design and verification teams to improve processes.
• Apply modern simulation-based verification methods to enhance effectiveness.

Skills

SystemVerilog

Python

Perl

Tcl

C/C++

Verification (UVM)

Job description

Arm in Cambridge is seeking a Senior Engineer to join the CPU verification team, owning verification across unit tests to full verification strategy. The role emphasizes collaboration with design and verification teams and applying advanced simulation-based methods.

The position offers a hybrid working model with no relocation package, and requires experience with SystemVerilog, UVM, and C/C++. Strong communication skills are essential to explain complex concepts to varied audiences.