Senior SerDes Analog Design Engineer — Equity & Local Bonus

OLIX; West of England; On-site; GBP 111,000 - 156,000; Full time

Benefits offered by this job

Equity & Ownership

Proximity Bonus

Retirement Benefits

Job summary

OLIX in Austin, TX is seeking a Senior/Staff Analog Design Engineer to lead high-speed SerDes and mixed-signal subsystems for a next-generation SoC. You will own circuit implementation through post-silicon validation, covering serializers, clock generation, equalization, and analog blocks.

This in-office role collaborates with teams across London and Bristol, and requires hands-on circuit design, verification, and model development in Cadence flows.

Qualifications

• MS or PhD in Electrical Engineering with 10+ years of analog/mixed-signal IC design experience.
• Strong analog mixed-signal design background with hands-on SerDes experience at data rates of 25 Gbps+.
• Solid understanding of high-speed signaling concepts: jitter, noise, equalization, signal integrity, and link budgeting.

Responsibilities

• Architect and design high-speed SerDes blocks from specification through silicon in advanced FinFET nodes.
• Perform schematic and post-layout simulations to ensure robust silicon margins and own design reviews.

Skills

SerDes design

High-speed signaling

Cadence tools

Verilog-A models

Mixed-signal verification

Education

MS or PhD in Electrical Engineering

Tools

Cadence Virtuoso

Spectre

EM-IR

Job description

OLIX in Austin, TX is seeking a Senior/Staff Analog Design Engineer to lead high-speed SerDes and mixed-signal subsystems for a next-generation SoC. You will own circuit implementation through post-silicon validation, covering serializers, clock generation, equalization, and analog blocks.

This in-office role collaborates with teams across London and Bristol, and requires hands-on circuit design, verification, and model development in Cadence flows.