Senior PPA Engineer for AI Accelerator Chips

Fractile Ltd.; West of England; Hybrid; GBP 90,000 - 150,000; Full time

Benefits offered by this job

Private Medical

Dental and Vision

Contributory Pension

25 Days holiday

Job summary

Fractile Ltd. is leading the charge in next-generation AI hardware in the United Kingdom. We seek a senior datapath engineer to drive RTL, PPA closure, and power-aware design across production datapath silicon.

You will collaborate with PD, software, and silicon teams to translate performance targets into concrete RTL and microarchitectural decisions, delivering measurable improvements and ensuring timing closure on critical paths.

Qualifications

• Strong datapath microarchitecture background with PPA focus.
• Experience driving datapath PPA closure end-to-end.
• Knowledge of fixed-point, floating-point, and/or quantized arithmetic.
• Ability to translate PPA targets into RTL and microarchitectural decisions.
• Experience with low-power design techniques.

Skills

Datapath RTL

PPA closure

Fixed/FP Arithmetic

PPA trade-offs

Low-power design

Synthesis tools

Timing analysis

Formal verification

PD collaboration

DesignWare IP

RTL verification

Education

BSc/MSc in Electrical Engineering

Tools

Synopsys Design Compiler

Cadence Genus

PrimeTime

DesignWare IP

RTL simulation

Job description

Fractile Ltd. is leading the charge in next-generation AI hardware in the United Kingdom. We seek a senior datapath engineer to drive RTL, PPA closure, and power-aware design across production datapath silicon.

You will collaborate with PD, software, and silicon teams to translate performance targets into concrete RTL and microarchitectural decisions, delivering measurable improvements and ensuring timing closure on critical paths.