Senior Physical Design Engineer – Satellite SoCs

IC Resources; Farnborough; On-site; GBP 65,000 - 85,000; Full time

Job summary

A leading international space technology organisation in Farnborough is looking for a Senior Physical Design Engineer to support the development of complex satellite SoCs. This role involves managing physical implementation, including floorplanning and timing closure, and requires expertise in ASIC development. Candidates should have a strong background in advanced node physical design and be familiar with industry-standard tools such as Cadence or Synopsys. A scripting capability is also essential.

Qualifications

• Strong background in ASIC development as a Senior Physical Design Engineer.
• Proven experience in physical design flows for advanced nodes (28nm or below).
• Solid understanding of floorplanning, timing closure, and physical sign-off.

Responsibilities

• Drive physical implementation of complex SoCs including integration of custom blocks.
• Manage floorplanning, place & route, and clock tree implementation strategies.
• Lead block-level timing closure and support full-chip timing convergence.

Skills

Senior Physical Design Engineering

ASIC development

Floorplanning

Place & Route (P&R)

Clock Tree Synthesis (CTS)

Static Timing Analysis (STA)

Scripting (Tcl, Python, Perl)

Tools

Cadence implementation tools

Synopsys implementation tools

Job description

A leading international space technology organisation in Farnborough is looking for a Senior Physical Design Engineer to support the development of complex satellite SoCs. This role involves managing physical implementation, including floorplanning and timing closure, and requires expertise in ASIC development. Candidates should have a strong background in advanced node physical design and be familiar with industry-standard tools such as Cadence or Synopsys. A scripting capability is also essential.