Senior Physical Design Automation Engineer

Aion Silicon Ltd; Greater London; In loco; GBP 90.000 - 120.000; Tempo pieno

Descrizione del lavoro

Aion Silicon Ltd. seeks a Senior Methodology Engineer to drive advanced Physical Design automation and quality systems for complex SoC/ASIC designs. You will develop scalable automation frameworks for the RTL-to-Signoff flow, enabling high-quality silicon across advanced process nodes.

You will collaborate with multiple teams to improve implementation methodologies, timing, power, and area metrics, while defining best practices and signoff methodologies across projects.

Competenze

• Bachelor's or Master's degree in Electrical/Electronics Engineering, Computer Engineering, or related field.
• 4+ years of experience in Physical Design, CAD Methodology, or Design Automation.
• Strong understanding of RTL to GDSII Signoff and full ASIC/SoC flow.
• Hands-on with industry-standard EDA tools and flow customization.
• Experience with advanced technology nodes (7nm/5nm/3nm or below).
• Experience in CAD infrastructure, methodology development, and design automation.
• Exposure to AI/ML or LLM-based solutions for EDA automation.

Mansioni

• Develop and maintain automation frameworks for RTL-to-Signoff Physical Design flow.
• Build methodology solutions for synthesis, floorplanning, power planning, placement, CTS, routing, timing closure, and signoff.
• Create quality checking, validation, and reporting systems for implementation and signoff metrics.
• Develop scalable tools, scripts, and data pipelines for design analysis and productivity.
• Collaborate with Physical Design, STA, DFT, RTL, Library, and CAD teams to improve methodologies.

Conoscenze

Python

Tcl

Perl

Shell

C++

AI/ML for EDA

Formazione

Electrical/Electronics or Computer Engineering degree

Strumenti

Innovus

Tempus

Voltus

Pegasus

Descrizione del lavoro

Aion Silicon Ltd. seeks a Senior Methodology Engineer to drive advanced Physical Design automation and quality systems for complex SoC/ASIC designs. You will develop scalable automation frameworks for the RTL-to-Signoff flow, enabling high-quality silicon across advanced process nodes.

You will collaborate with multiple teams to improve implementation methodologies, timing, power, and area metrics, while defining best practices and signoff methodologies across projects.