Senior Methodology Engineer – Physical Design Automation

Aion Silicon Ltd; Greater London; On-site; GBP 90,000 - 120,000; Full time

Job summary

Aion Silicon Ltd. seeks a Senior Methodology Engineer to drive advanced Physical Design automation and quality systems for complex SoC/ASIC designs. You will develop scalable automation frameworks for the RTL-to-Signoff flow, enabling high-quality silicon across advanced process nodes.

You will collaborate with multiple teams to improve implementation methodologies, timing, power, and area metrics, while defining best practices and signoff methodologies across projects.

Qualifications

• Bachelor's or Master's degree in Electrical/Electronics Engineering, Computer Engineering, or related field.
• 4+ years of experience in Physical Design, CAD Methodology, or Design Automation.
• Strong understanding of RTL to GDSII Signoff and full ASIC/SoC flow.
• Hands-on with industry-standard EDA tools and flow customization.
• Experience with advanced technology nodes (7nm/5nm/3nm or below).
• Experience in CAD infrastructure, methodology development, and design automation.
• Exposure to AI/ML or LLM-based solutions for EDA automation.

Responsibilities

• Develop and maintain automation frameworks for RTL-to-Signoff Physical Design flow.
• Build methodology solutions for synthesis, floorplanning, power planning, placement, CTS, routing, timing closure, and signoff.
• Create quality checking, validation, and reporting systems for implementation and signoff metrics.
• Develop scalable tools, scripts, and data pipelines for design analysis and productivity.
• Collaborate with Physical Design, STA, DFT, RTL, Library, and CAD teams to improve methodologies.

Skills

Python

Tcl

Perl

Shell

C++

AI/ML for EDA

Education

Electrical/Electronics or Computer Engineering degree

Tools

Innovus

Tempus

Voltus

Pegasus

Job description

We are seeking a highly motivated Senior Methodology Engineer to drive the development of advanced Physical Design automation, methodologies, and quality systems for complex SoC and ASIC designs. The ideal candidate will combine strong expertise in the RTL-to-Signoff Physical Design flow with software development skills to build scalable automation frameworks, improve design productivity, and enable high-quality silicon delivery across advanced process technologies.

Key Responsibilities

Develop and maintain automation frameworks supporting the complete RTL-to-Signoff Physical Design flow.

Build methodology solutions for synthesis, floorplanning, power planning, placement, CTS, routing, timing closure, and signoff.

Create quality checking, validation, and reporting systems for implementation and signoff metrics.

Develop scalable tools, scripts, and data pipelines for design analysis, productivity enhancement, and methodology optimization.

Collaborate with Physical Design, STA, DFT, RTL, Library, and CAD teams to improve implementation methodologies and design quality.

Drive continuous improvements in timing, power, area, congestion, IR/EM, and physical verification closure.

Define and maintain best practices, design guidelines, and signoff methodologies across multiple projects.

Support advanced-node implementation challenges through innovative automation and data-driven solutions.

Required / Preferred Qualifications

Bachelor's or Master's degree in Electrical/Electronics Engineering, Computer Engineering, or related field.

4+ years of experience in Physical Design, CAD Methodology, or Design Automation.

Strong understanding of the complete ASIC/SoC implementation flow from RTL to GDSII Signoff.

Hands-on experience with industry-standard EDA tools and flow customization.

Experience with advanced technology nodes (7nm, 5nm, 3nm, or below).

Strong knowledge of hierarchical and top-down design methodologies.

Experience in Physical Design flow automation, CAD infrastructure, and methodology development.

Exposure to AI/ML or LLM-based solutions for EDA automation and productivity enhancement.

Excellent problem-solving, debugging, and cross-functional collaboration skills.

Tools & Skills

Cadence: Innovus, Tempus, Voltus, Pegasus

Programming: Python, Tcl, Perl, Shell, C++

Automation: Workflow development, data pipelines, quality dashboards, methodology deployment