Senior FPGA Verification Architect - UVM/SystemVerilog Oxford

IC Resources

Oxford

On-site

GBP 65,000 - 95,000

Full time

37 hours ago
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Benefits offered by this job

RSUs
Bonus
Visa sponsorship
Relocation support

Job summary

IC Resources in Oxford seeks a Senior Verification Engineer to join its growing quantum technology team. You will own verification environments and define methodologies at the intersection of FPGA development and quantum tech.

You will work closely with FPGA/RTL Designers to build constrained-random, coverage-driven verification plans and automated regression. Visa sponsorship and relocation are available for UK residents only.

Qualifications

  • Strong SystemVerilog and UVM experience.
  • Experience architecting and developing verification environments.
  • Constrained-random and coverage-driven verification experience.
  • Verification planning and requirements gathering.
  • Python for scripting and test automation.
  • Strong debugging and problem-solving skills.
  • Experience working closely with RTL/FPGA design teams.

Responsibilities

  • Architect, develop and maintain advanced UVM/SystemVerilog verification environments for complex FPGA designs.
  • Define and execute comprehensive verification plans.
  • Develop constrained-random test environments and drive coverage closure.
  • Collaborate with RTL/FPGA engineers to debug failures and improve design quality.
  • Develop and maintain automated regression environments.
  • Support CI and verification workflows across the FPGA development lifecycle.
  • Help define and drive verification methodology and best practices across the team.

Skills

SystemVerilog
UVM
Constrained-random
Coverage-driven
Python scripting
Debugging
Verification planning
RTL/FPGA collaboration

Job description

IC Resources in Oxford seeks a Senior Verification Engineer to join its growing quantum technology team. You will own verification environments and define methodologies at the intersection of FPGA development and quantum tech.

You will work closely with FPGA/RTL Designers to build constrained-random, coverage-driven verification plans and automated regression. Visa sponsorship and relocation are available for UK residents only.

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