Senior FPGA IP Engineer for Robotics Compute

Altera; Basingstoke; On-site; GBP 90,000 - 120,000; Full time

Job summary

Altera in Marlow, United Kingdom, is looking for a Senior FPGA IP Solutions Engineer to join the Robotics Technology Group. This hands-on role focuses on designing, verifying, and delivering high-performance FPGA IP and solutions for robotics and industrial automation.

You will own RTL IP and the HAL/driver APIs, work on sensor ingestion, pre-processing, fusion, and real-time compute accelerators, and collaborate with software and systems teams to create reference designs and customer platforms.

Qualifications

• Min 10+ years experience with BSc / MSc (or equivalent) in Electrical/Electronic Engineering (EEE), Computer Engineering, Computer Science, or a related discipline.
• Strong production experience in RTL design (Verilog and/or SystemVerilog) targeting FPGAs
• Hands-on experience with RTL verification and simulation (e.g. ModelSim/Questa, VCS, or equivalent)
• Proven ability to close timing and optimize resource utilization on real FPGA designs
• Working knowledge of Quartus Prime and Platform Designer (or equivalent FPGA toolchain and system integration flows)
• Experience debugging FPGA designs using on-chip instrumentation (e.g. SignalTap Logic Analyzer) and hands-on bring-up and debug on development kits and physical boards
• Familiarity with modern engineering infrastructure such as Perforce and/or GitHub, and CI systems such as Jenkins and/or TeamCity
• Strong analytical, debug, and problem-solving skills, with clear written and verbal communication

Responsibilities

• Design, implement, and optimize high-performance soft IP in Verilog/SystemVerilog for robotics and industrial solutions
• Define and maintain low-level HAL / driver APIs that expose IP capabilities to embedded and host software
• Develop RTL for sensor ingestion, pre-processing, fusion, and mathematical / DSP algorithms mapped efficiently to FPGA fabric
• Apply strong FPGA architecture awareness to drive resource allocation (ALMs, DSP, memory), Fmax, and power/performance trade-offs
• Integrate IP into system designs using Quartus Prime and Platform Designer (Avalon / AXI interconnects, streaming and memory-mapped fabrics), with awareness of full-stack solution integration
• Write and maintain testbenches; perform functional simulation and regression of IP and subsystems
• Drive static timing analysis (STA), timing closure, clock-domain crossing (CDC) correctness, and constraint quality
• Debug designs through simulation, SignalTap / on-chip debug, and lab bring-up as required
• Contribute to design examples, simulation models, and technical documentation for internal and customer use
• Work effectively within engineering infrastructure including Perforce, GitHub, Jenkins and TeamCity

Skills

RTL design

Verilog/SystemVerilog

Timing closure

Debug & problem solving

Written and verbal communication

Education

BSc / MSc in Electrical/Electronic Engineering or related

Tools

Quartus Prime

Platform Designer

ModelSim/Questa/VCS

SignalTap

Perforce

GitHub

Jenkins

TeamCity

Job description

Altera in Marlow, United Kingdom, is looking for a Senior FPGA IP Solutions Engineer to join the Robotics Technology Group. This hands-on role focuses on designing, verifying, and delivering high-performance FPGA IP and solutions for robotics and industrial automation.

You will own RTL IP and the HAL/driver APIs, work on sensor ingestion, pre-processing, fusion, and real-time compute accelerators, and collaborate with software and systems teams to create reference designs and customer platforms.