Senior FPGA IP Architect for Robotics & Real-Time Systems

326 Altera Semiconductor Technology UK Limited; Marlow; On-site; GBP 90,000 - 130,000; Full time

Job summary

Altera seeks a Senior FPGA IP Solutions Engineer in Marlow, UK, to design, verify, and deliver high-performance FPGA IP and HAL interfaces for robotics and industrial automation. You will own RTL IP, integration with software stacks, and drive timing closure within a small, highly technical team.

You will work with Quartus Prime, Platform Designer, and modern verification tools to ensure robust IP, system compatibility, and reference designs for robotics platforms, including ROS2-based stacks.

Qualifications

• Min 10+ years experience with BSc / MSc (or equivalent) in Electrical/Electronic Engineering, Computer Engineering, Computer Science, or related field.
• Strong production experience in RTL design (Verilog/SystemVerilog) targeting FPGAs.
• Hands-on experience with RTL verification and simulation (ModelSim/Questa, VCS, or equivalent).
• Proven ability to close timing and optimize resource utilization on real FPGA designs.
• Working knowledge of Quartus Prime and Platform Designer (or equivalent).
• Experience debugging FPGA designs using on-chip instrumentation and development kits.
• Familiarity with CI tools such as Jenkins and GitHub.

Responsibilities

• Design, implement, and optimize high-performance soft IP in Verilog/SystemVerilog for robotics and industrial solutions.
• Define and maintain low-level HAL / driver APIs exposing IP capabilities to software.
• Develop RTL for sensor ingestion, pre-processing, fusion, and DSP algorithms mapped to FPGA fabric.
• Apply FPGA architecture awareness to drive resource allocation, Fmax, and power/performance trade-offs.
• Integrate IP into system designs using Quartus Prime and Platform Designer.
• Verify, simulate, and timing-closure of IP and subsystems; write testbenches.
• Collaborate with software, systems, and applications engineers on HW/SW co-design and platform integration.

Skills

RTL design

Verilog/SystemVerilog

FPGA architecture

RTL verification & simulation

Quartus Prime

Platform Designer

Python scripting

CI/CD tooling

Timing closure

SignalTap

Education

BSc / MSc in Electrical/Electronic Engineering or related

Tools

Quartus Prime

Platform Designer

ModelSim/Questa

VCS

SignalTap

GitHub

Jenkins

Job description

Altera seeks a Senior FPGA IP Solutions Engineer in Marlow, UK, to design, verify, and deliver high-performance FPGA IP and HAL interfaces for robotics and industrial automation. You will own RTL IP, integration with software stacks, and drive timing closure within a small, highly technical team.

You will work with Quartus Prime, Platform Designer, and modern verification tools to ensure robust IP, system compatibility, and reference designs for robotics platforms, including ROS2-based stacks.