Senior FPGA Engineer - High-Performance Trading Tech

Drweng

Greater London

On-site

GBP 70,000 - 110,000

Full time

7 days ago
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Job summary

DRW is seeking an Experienced FPGA Engineer to join one of our trading teams in London. You will design and implement low-latency FPGA solutions, collaborating with software and trading teams across a full development lifecycle.

The ideal candidate has a strong background in Verilog RTL design, FPGA design flow, and the ability to work autonomously on complex projects from requirements to production in a fast-paced, high-performance environment.

Qualifications

  • Bachelor’s degree or higher in Computer or Electrical Engineering.
  • Solid hardware engineering experience, especially with FPGA.
  • Highly autonomous with a can-do attitude able to lead an FPGA based project from system requirements to production.
  • Strong skills in RTL logic design (Verilog) and verification; 2+ years of experience writing Verilog.
  • Experience with the design of system-on-chip architectures, memory and processor subsystems, networking, and peripheral interconnect.
  • Knowledge of the TCP/IP stack.

Responsibilities

  • Architect and implement new FPGA applications from the ground up.
  • Research and evaluate cutting-edge FPGA hardware and technologies.
  • Propose creative solutions to overcome FPGA hardware limitations.
  • Liaise directly with software, trading and other design teams.
  • Conduct lab debugging and characterization of new hardware.
  • Production support and live debugging.
  • Researching new techniques, tools and architectures.

Skills

RTL design
Verilog
FPGA development
SystemVerilog

Education

Bachelor's degree in Computer/Electrical Engineering

Tools

Xilinx FPGA design flow
Altera FPGA design flow
Synthesis/Place & Route
Static timing analysis

Job description

DRW is seeking an Experienced FPGA Engineer to join one of our trading teams in London. You will design and implement low-latency FPGA solutions, collaborating with software and trading teams across a full development lifecycle.

The ideal candidate has a strong background in Verilog RTL design, FPGA design flow, and the ability to work autonomously on complex projects from requirements to production in a fast-paced, high-performance environment.

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