Lead FPGA RTL Engineer for High-Speed Trading | Hybrid

Ecm Selection; Cambridge; Hybrid; GBP 70,000 - 110,000; Full time

Benefits offered by this job

Hybrid working

Cambridge office

Parking

Flexible hours

Food and drinks/snacks

Tailored remuneration

Job summary

Ecm Selection in Cambridge's R&D office is seeking a senior FPGA engineer to lead the end-to-end FPGA systems design, focusing on high-speed RTL logic for nanoseconds-scale trading. You’ll collaborate closely with software engineers writing in Rust and C++ to deliver robust solutions.

The role offers hybrid working and a friendly, senior team environment in north Cambridge, with parking and flexible hours. Remuneration is tailored to experience.

Qualifications

• Experience leading FPGA systems design.
• Strong RTL design and optimization.
• Excellent collaboration with software teams.

Responsibilities

• Take the lead and oversee all aspects of FPGA systems’ design
• Pursue superior technical approaches to the problem
• Collaborate with software engineers working in Rust and C++
• See your work put to productive use with fast cycles

Skills

FPGA design

RTL design

Team collaboration

Tools

Rust

C++

Job description

Ecm Selection in Cambridge's R&D office is seeking a senior FPGA engineer to lead the end-to-end FPGA systems design, focusing on high-speed RTL logic for nanoseconds-scale trading. You’ll collaborate closely with software engineers writing in Rust and C++ to deliver robust solutions.

The role offers hybrid working and a friendly, senior team environment in north Cambridge, with parking and flexible hours. Remuneration is tailored to experience.