FPGA Intern: Build Trading Apps in London

DRW Holdings, LLC.; Greater London; On-site; GBP 11,160 - 20,088; Full time

Benefits offered by this job

Housing

Social events

Job summary

DRW is offering an FPGA Intern role in London to build advanced trading applications and deploy a real-world FPGA project during a 10-week program. Interns work under senior technologists and participate in city-based social events after work.

The role emphasizes learning, experimentation, and impactful contributions to trading infrastructure. Ideal candidates are pursuing a degree in EE/CS/Math/Physics with graduation between December 2027 and June 2028, have FPGA exposure, strong

Qualifications

• Pursuing a Bachelor’s, Master’s, or PhD with an expected graduation between December 2027 and June 2028.
• Exposure to the FPGA development flow.
• Strong understanding of data structures and algorithms.
• Experience with SystemVerilog/Verilog/VHDL and knowledge of C++ or Python.
• Strong communication and collaboration skills.
• Eagerness to learn and apply new technologies quickly.

Responsibilities

• Design, develop, test, and deploy proprietary FPGA solutions.
• Create decoders to receive raw packet data and translate it for accessibility.
• Develop modules to trigger events for traded instruments on exchanges.
• Innovate FPGA architectures to expand data processing capabilities.
• Collaborate with software developers, quantitative traders, researchers, and business analysts in cross-functional teams.

Skills

SystemVerilog/Verilog/VHDL

C++

Python

Data structures & algorithms

Communication & collaboration

Education

Bachelor’s, Master’s, or PhD in EE/CS/related fields

Job description

DRW is offering an FPGA Intern role in London to build advanced trading applications and deploy a real-world FPGA project during a 10-week program. Interns work under senior technologists and participate in city-based social events after work.

The role emphasizes learning, experimentation, and impactful contributions to trading infrastructure. Ideal candidates are pursuing a degree in EE/CS/Math/Physics with graduation between December 2027 and June 2028, have FPGA exposure, strong