Senior FPGA Engineer – Compute Architecture & Hardware Acceleration

Redline Group - Specialist Recruitment for Technology & Electronics Companies; Oxford; Hybrid; GBP 90,000 - 120,000; Full time

Job summary

Redline Group is seeking a Senior FPGA Engineer – Compute Architecture & Hardware Acceleration to join a technology company in Oxford on a hybrid basis. You will translate complex probabilistic algorithms into efficient FPGA RTL designs and help develop next-generation hardware acceleration solutions.

The role requires strong HDL, FPGA design experience and familiarity with PS/PL architectures, with collaboration across hardware and software teams to define system architecture and ensure timing

Qualifications

• Degree in Electrical or related engineering discipline.
• Proven FPGA digital design experience with high-speed systems.
• Strong HDL experience and RTL development from scratch.

Responsibilities

• Translate probabilistic algorithms from Python, C++, MATLAB into pipelined FPGA RTL designs.
• Design and implement custom digital logic in VHDL from scratch.
• Architect and integrate high-speed data acquisition pipelines with PCIe and high-speed transceivers.
• Collaborate with hardware engineers, software developers, researchers and ASIC architects to define system architecture.
• Develop verification environments and optimise timing, power and resources across multiple clock domains.

Skills

FPGA design

HDL programming

Xilinx Vivado

Zynq PS/PL

Timing closure

CDC awareness

Debugging tools

Fixed-point modelling

Education

Electrical Engineering degree

Tools

Vivado

Vitis

TCL scripting

Job description

Excellent opportunity for a Senior FPGA Engineer – Compute Architecture & Hardware Acceleration to join an innovative technology business on a hybrid basis, with time spent at their Oxford site, helping develop next-generation probabilistic computing platforms and advanced hardware acceleration solutions. This role will require expertise in FPGA design, algorithm implementation, and high-speed digital systems development.

Key responsibilities for the Senior FPGA Engineer – Compute Architecture & Hardware Acceleration role (hybrid and Oxford based):

• Translate complex probabilistic algorithms from Python, C++, MATLAB and pseudocode into highly pipelined, resource-efficient FPGA RTL designs
• Design and implement custom digital logic in VHDL from scratch where vendor IP is unsuitable, introduces latency or creates bottlenecks
• Architect and integrate high-speed data acquisition pipelines utilising ultra-fast ADCs, PCIe, high-speed Ethernet and transceiver technologies
• Work closely with hardware engineers, software developers, researchers and ASIC architects to define system architecture and technical solutions
• Develop robust verification environments, perform hardware bring-up activities and optimise timing, power and resource utilisation across multiple clock domains

Key skills required for the Senior FPGA Engineer – Compute Architecture & Hardware Acceleration role:

• Degree in Electrical Engineering, Computer Engineering or a related discipline
• Demonstrable experience of FPGA digital design experience developing complex, high-speed digital systems
• Strong HDL expertise with a proven ability to develop custom RTL from scratch
• Experience with FPGA SoC platforms, including practical knowledge of processor-side development and PS/PL architectures such as Zynq
• Proven ability to translate mathematical or algorithmic models into hardware accelerators using fixed-point arithmetic and bit-accurate modelling techniques
• Strong understanding of timing closure, clock domain crossing (CDC) and advanced digital design principles
• Experience with Xilinx Vivado, Vitis and TCL scripting toolchains
• Familiarity with hardware debugging tools including oscilloscopes, logic analysers, JTAG debuggers and signal generators

This is an opportunity to work at the forefront of probabilistic computing, helping define the hardware architecture for a revolutionary computing platform while collaborating with leading experts and researchers in the field.