Senior FPGA Engineer: Compute Architecture & Acceleration

Redline Group Ltd

Oxford

Hybrid

GBP 70,000 - 110,000

Full time

14 days+

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Job summary

Redline Group Ltd in Oxford is seeking a Senior FPGA Engineer - Compute Architecture & Hardware Acceleration to help develop next-generation probabilistic computing platforms. The role is hybrid, with time on site in Oxford and collaboration with hardware and software teams.

You will translate algorithms into FPGA RTL, design custom logic with VHDL, and optimise timing, power and data pipelines while using Xilinx tools and verification environments.

Qualifications

  • Degree in Electrical Engineering, Computer Engineering or a related discipline.
  • Proven FPGA digital design experience developing complex, high-speed digital systems.
  • Strong HDL expertise with a proven ability to develop custom RTL from scratch.
  • Experience with FPGA SoC platforms including PS/PL architectures such as Zynq.
  • Proven ability to translate mathematical or algorithmic models into hardware accelerators using fixed-point arithmetic.

Responsibilities

  • Translate complex probabilistic algorithms from Python, C++, MATLAB into highly pipelined FPGA RTL designs.
  • Design and implement custom digital logic in VHDL from scratch where vendor IP is unsuitable.
  • Architect and integrate high-speed data acquisition pipelines utilising PCIe, high-speed Ethernet and transceiver technologies.
  • Work closely with hardware engineers, software developers, researchers and ASIC architects to define system architecture and technical solutions.
  • Develop robust verification environments, perform hardware bring-up activities and optimise timing, power and resource utilisation across multiple clock domains.

Skills

FPGA design
HDL expertise
Timing closure
Clock domain crossing
High-speed digital systems
Python/C++/MATLAB (algorithm maps)

Education

Degree in Electrical/Computer Engineering or related

Tools

Xilinx Vivado
Xilinx Vitis
TCL scripting
Oscilloscopes/logic analyzers
JTAG debugging

Job description

Redline Group Ltd in Oxford is seeking a Senior FPGA Engineer - Compute Architecture & Hardware Acceleration to help develop next-generation probabilistic computing platforms. The role is hybrid, with time on site in Oxford and collaboration with hardware and software teams.

You will translate algorithms into FPGA RTL, design custom logic with VHDL, and optimise timing, power and data pipelines while using Xilinx tools and verification environments.

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