Senior Digital Hardware Design Engineer (FPGA/ASIC)

Zenovo; Leicester; On-site; GBP 60,000 - 90,000; Full time

Job summary

Zenovo in Leicester is seeking an experienced Senior Digital Hardware Design Engineer to take ownership of complex digital hardware from concept through production. You will collaborate with multidisciplinary teams to ensure robust, high‑performance designs.

You will design, simulate and verify RTL, optimise timing, and contribute to system‑level decisions. The role involves working with manufacturing for volume production and ensuring long‑term component availability in harsh environments.

Qualifications

• Degree in Electronic Engineering, Electrical Engineering, Computer Engineering, or related discipline.
• 3+ years' experience in high-speed digital hardware design.
• Strong understanding of clocking strategies, CDC, and timing constraints.
• Experience with FPGA development tools.

Responsibilities

• Design and implement digital hardware including high-speed interfaces, signal processing and switching/routing architectures.
• Develop, simulate and verify RTL designs, ensuring timing closure, robustness, and design correctness.
• Define and review hardware architectures, contributing to system-level design decisions and technical trade-off analysis.
• Produce and review technical documentation, including specifications, schematics, and hardware test plans.
• Perform functional simulation, synthesis and static timing analysis targeting FPGA and/or ASIC technologies.
• Collaborate with firmware, software, and systems engineers to ensure successful hardware/software integration.
• Support hardware verification, validation, laboratory bring-up and board-level debugging.
• Participate in design reviews, code reviews and continuous improvement of engineering processes.
• Work closely with manufacturing teams to optimise designs for volume manufacture and test.
• Liaise with component manufacturers and suppliers to support long‑term product availability.
• Design for reliable operation in demanding or harsh environments.

Skills

High-speed digital hardware design

Clocking strategies

Clock Domain Crossing (CDC)

Timing constraints

FPGA development tools

Education

Bachelor's degree in Electronic/ Electrical/ Computer Engineering or related

Tools

ModelSim

Questa

Altium Designer

Job description

Zenovo in Leicester is seeking an experienced Senior Digital Hardware Design Engineer to take ownership of complex digital hardware from concept through production. You will collaborate with multidisciplinary teams to ensure robust, high‑performance designs.

You will design, simulate and verify RTL, optimise timing, and contribute to system‑level decisions. The role involves working with manufacturing for volume production and ensuring long‑term component availability in harsh environments.