Senior Digital ASIC Design Engineer

IC Resources; Cambridgeshire and Peterborough; On-site; GBP 65,000 - 95,000; Full time

Job summary

IC Resources is seeking an experienced RTL design engineer to join a pioneering semiconductor team in the UK. You will translate algorithms into RTL, develop ASIC/FPGA solutions, and work across Systems, Verification and Physical Design from specification to validation.

You will design and optimise high‑throughput digital blocks, create verification environments, and deploy on FPGA platforms for integration and performance.

Qualifications

• Strong experience designing complex ASIC and/or FPGA systems.
• Excellent RTL skills using Verilog or SystemVerilog.
• Experience optimising high throughput designs for performance and resource utilisation.
• Knowledge of synthesis, timing analysis and power optimisation.
• Experience working across multidisciplinary hardware teams.
• Strong technical documentation skills.
• Experience with industry standard simulation and synthesis tools.

Responsibilities

• Translate system and algorithm requirements into efficient RTL micro architectures.
• Design and implement complex digital logic for ASIC and FPGA platforms.
• Develop simulation environments and testbenches to verify functionality.
• Deploy designs onto FPGA platforms for validation and system integration.
• Optimise designs for timing, throughput, area and power.
• Work closely with Verification, Physical Design and Systems teams.
• Contribute to design methodologies and engineering processes.

Skills

ASIC design

FPGA design

RTL design

Verilog/SystemVerilog

High throughput optimisation

Synthesis & timing analysis

Power optimisation

Documentation skills

Multidisciplinary teamwork

Industry standard tools

Tools

ModelSim

Cadence tools

Synopsys tools

Vivado

Job description

Join an innovative semiconductor company developing next generation communications technology for satellite based 5G connectivity.

This is an opportunity to work on complex digital hardware, developing ASIC and FPGA solutions for demanding communications applications. You’ll translate advanced algorithms into efficient RTL, contributing to high performance IP and complete system solutions.

Working within a multidisciplinary engineering team, you’ll collaborate with Systems, Architecture, Verification and Physical Design teams from specification through to implementation and validation.

Responsibilities

• Translate system and algorithm requirements into efficient RTL micro architectures
• Design and implement complex digital logic for ASIC and FPGA platforms
• Develop simulation environments and testbenches to verify functionality
• Deploy designs onto FPGA platforms for validation and system integration
• Optimise designs for timing, throughput, area and power
• Work closely with Verification, Physical Design and Systems teams
• Contribute to design methodologies and engineering processes

What they’re looking for

• Strong experience designing complex ASIC and/or FPGA systems
• Excellent RTL skills using Verilog or SystemVerilog
• Experience optimising high throughput designs for performance and resource utilisation
• Knowledge of synthesis, timing analysis and power optimisation
• Experience working across multidisciplinary hardware teams
• Strong technical documentation skills
• Experience with industry standard simulation and synthesis tools

This role can also be based in Southampton or Bristol.

Tel - 01189073075

LinkedIn - https://www.linkedin.com/in/jordan-browne-b4a08b20b/