Digital ASIC Design Engineer

Technical Futures Ltd; Cambridge; Hybrid; GBP 55,000 - 90,000; Full time

Job summary

Technical Futures Ltd in Cambridge is seeking a Digital ASIC Design Engineer to design and implement FPGA-based SoC systems. Hybrid working (up to 3 days per week from home) and a very generous salary on offer.

Applications welcome from mid to senior level engineers with strong VHDL/Verilog, RTL verification and Python skills, plus experience in SoC design and integration. You will work closely with hardware, software and mechanical teams to bring new imaging/AR products to market.

Qualifications

• Bachelor’s / Master’s in Electronic Engineering or related discipline.
• Solid FPGA, VHDL / Verilog skills.
• SoC design and Integration experience.
• Python skills.
• RTL Verification experience.
• Experience writing timing constraints and ensuring these are met.
• Designing for low power.

Responsibilities

• Design and implement FPGA-based SoC systems.
• Collaborate with hardware, software and mechanical engineers to bring products to market.
• Ensure timing constraints are met and optimize for low power.

Skills

FPGA

VHDL

Verilog

RTL Verification

SoC design

Python

Timing constraints

Low power design

Education

Bachelor's / Master’s in Electronic Engineering

Job description

Are you a Digital ASIC Design Engineer seeking a challenging career move where you can contribute to the very latest imaging and augmented reality systems, designing and implementing FPGA based SoC systems? Hybrid working (up to 3 days per week from home) and very generous salary on offer. Applications welcome from mid to senior level engineers.

This award-winning Technology company seeks a Degree qualified Digital ASIC Design Engineer with SoC design and Integration skills, proven FPGA, VHDL & Verilog experience, RTL Verification experience and some Python knowledge.

In this role the successful Digital ASIC Design Engineer will work closely with hardware, software and mechanical engineers to bring exciting new products to market.

The Digital ASIC Design Engineer should ideally bring:

• Bachelors / Masters Degree in Electronic Engineering or related discipline.
• Solid FPGA, VHDL / Verilog skills.
• SoC design and Integration experience.
• Python skills.
• RTL Verification experience.
• Experience writing timing constraints and ensuring these are met.
• Designing for low power.

To find out more on this rewarding Digital ASIC Design Engineer role, you must have full eligibility to work in the UK without sponsorship. Sorry - no student Visa's.