Senior DFT Engineer - RTL/MBIST & iJTAG

Nordic Semi

West of England

On-site

GBP 65,000 - 90,000

Full time

14 days+

Get a reply from this employer

Your resume and cover letter, tailored to exactly what they’re hiring for.

Get past ATS filters

Benefits offered by this job

Competitive salary with incentive plan
Flexible working hours
Medical insurance
Family-friendly policies and benefits

Job summary

Nordic Semiconductor in Bristol, UK seeks an experienced DFT Engineer to lead end-to-end design for testability, implement MBIST/EDT/OCC strategies, iJTAG techniques, and automatic pattern generation. You will analyze test coverage, run RTL and netlist simulations, and sign off on DFT documentation.

Strong English communication and teamwork are essential for this globally active organization. The role emphasizes independent work, collaboration with a world-class IC design team, and ongoing

Qualifications

  • BSc/MSc in Electronics Engineering or similar.
  • Extensive experience with EDA IC design and verification tools.
  • Experience with Digital IC Design and Verification, DFT architecture and implementation, Memory BIST, iJTAG, EDT, OCC, Scan, ATPG and pattern simulations is preferred.
  • Knowledge of scripting languages like Perl, Tcl, Python or similar.
  • Experience with Tessent tools, Confluence and JIRA.
  • Excellent documentation and communication skills.
  • Ability to work/communicate fluently in English.

Responsibilities

  • Implement and utilize effective and efficient testing strategies.
  • Implementing MBIST and validating it through extensive simulations
  • Inserting and validating Embedded Deterministic Test (EDT) and On-Chip Clocking (OCC) methodologies
  • Inserting and validating scan and iJTAG (Internal JTAG) techniques
  • Generating automatic test patterns
  • Analyze the test coverage of our designs, identify areas of improvement, and implement strategies to increase test coverage and the testability
  • Performing pattern simulations at both the RTL and netlist level with and without timing backannotation
  • Documentation and DFT sign-off activities

Skills

Digital IC Design
DFT
Scripting
Pattern simulations

Education

BSc/MSc in Electronics Engineering

Tools

Tessent
Confluence
JIRA

Job description

Nordic Semiconductor in Bristol, UK seeks an experienced DFT Engineer to lead end-to-end design for testability, implement MBIST/EDT/OCC strategies, iJTAG techniques, and automatic pattern generation. You will analyze test coverage, run RTL and netlist simulations, and sign off on DFT documentation.

Strong English communication and teamwork are essential for this globally active organization. The role emphasizes independent work, collaboration with a world-class IC design team, and ongoing

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Senior DFT Engineer
Senior DFT Engineer

Nordic Semiconductor • West of England

On-site
GBP 65,000 - 90,000
Competitive salary
Medical insurance
Family-friendly policies
Senior DFT Engineer
Senior DFT Engineer

Nordic Semi • West of England

On-site
GBP 65,000 - 90,000
Competitive salary with incentive plan
Flexible working hours
Medical insurance
+1
DFT Engineer for AI Silicon & Data-Center Tests
DFT Engineer for AI Silicon & Data-Center Tests

Graphcore • West of England

On-site
GBP 90,000 - 130,000
Private medical insurance
Pension (matched up to 5%)
Life assurance
+4
Senior DFT Architect for AI Accelerator SoC
Senior DFT Architect for AI Accelerator SoC

Fractile • Greater London

On-site
GBP 110,000 - 150,000
Private Medical
Equity & Ownership
25 Days holiday
+1
Front-End IC Design Engineer — RTL, Verification, Flexible Hours
Front-End IC Design Engineer — RTL, Verification, Flexible Hours

Nordic Semi • West of England

On-site
GBP 70,000 - 110,000
Competitive salary with incentive plan
Flexible working hours
Medical insurance
+1
ASIC Digital Synthesis Engineer
ASIC Digital Synthesis Engineer

Nordic Semi • West of England

On-site
GBP 70,000 - 110,000
Competitive salary
Flexible hours
Medical insurance
+1
Low-Power Front-End Design Engineer for Wi‑Fi SoCs
Low-Power Front-End Design Engineer for Wi‑Fi SoCs

Nordic Semiconductor • West of England

On-site
GBP 70,000 - 100,000
Competitive salary
Flexible working hours
Medical insurance
+1
ASIC RTL Design Engineer
ASIC RTL Design Engineer

Nordic Semi • West of England

Hybrid
GBP 80,000 - 110,000
Competitive salary
Flexible working hours
Medical insurance
+1
Senior DFT Engineer for AI Compute Silicon
Senior DFT Engineer for AI Compute Silicon

Graphcore • Cambridge

On-site
GBP 90,000 - 120,000
Flexible working
Private medical insurance
Pension (matched)
+3
Senior IC Design Engineer — Hybrid & Semiconductors
Senior IC Design Engineer — Hybrid & Semiconductors

FBI &TMT • Fareham

Hybrid
GBP 60,000 - 100,000
Hybrid working
Long-term career development
Global impact projects